diff options
author | Alain Volmat | 2020-04-20 16:57:56 +0200 |
---|---|---|
committer | Wolfram Sang | 2020-04-26 09:50:15 +0200 |
commit | dd16163ea24b986136e0d11b9ebd861cef9d308d (patch) | |
tree | 88703cfd19ebe751cc209a513b7929947fcb94b4 /Documentation/devicetree | |
parent | e07a89775c71a246c99b9cc3fbe5f932b72765ed (diff) |
dt-bindings: i2c: i2c-stm32f7: allow clock-frequency range
For STM32F7, STM32H7 and STM32MP1 SoCs, if timing parameters
match, the bus clock frequency can be from 1Hz to 1MHz.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml index 900ec1ab6a47..b50a2f420b36 100644 --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml @@ -80,11 +80,11 @@ properties: clock-frequency: description: Desired I2C bus clock frequency in Hz. If not specified, the default 100 kHz frequency will be used. - For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, - Fast-mode and Fast-mode Plus are supported, possible - values are 100000, 400000 and 1000000. + For STM32F7, STM32H7 and STM32MP1 SoCs, if timing parameters + match, the bus clock frequency can be from 1Hz to 1MHz. default: 100000 - enum: [100000, 400000, 1000000] + minimum: 1 + maximum: 1000000 required: - compatible |