diff options
| author | Thierry Reding | 2017-11-07 19:15:47 +0100 |
|---|---|---|
| committer | Linus Walleij | 2017-11-08 14:06:21 +0100 |
| commit | f0fbe7bce733561b76a5b55c5f4625888acd3792 (patch) | |
| tree | 396ecdc63cab3227779a28cf43a5a3e2c7cfe3b1 /Documentation/gpio | |
| parent | da80ff81a8f54611b834d73149f8ac0d59151c87 (diff) | |
gpio: Move irqdomain into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/gpio')
| -rw-r--r-- | Documentation/gpio/driver.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt index fc1d2f83564d..dcf6af1d9e56 100644 --- a/Documentation/gpio/driver.txt +++ b/Documentation/gpio/driver.txt @@ -254,7 +254,7 @@ GPIO irqchips usually fall in one of two categories: static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) unsigned long wa_lock_flags; raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); - generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, bit)); + generic_handle_irq(irq_find_mapping(bank->chip.irq.domain, bit)); raw_spin_unlock_irqrestore(&bank->wa_lock, wa_lock_flags); * GENERIC CHAINED GPIO irqchips: these are the same as "CHAINED GPIO irqchips", |