diff options
author | Tadeusz Struk | 2016-09-25 07:44:51 -0700 |
---|---|---|
committer | Doug Ledford | 2016-10-02 08:42:19 -0400 |
commit | c642cc070b4934cd4718e63aa46e140468bc6a60 (patch) | |
tree | 9b6e29b37f44a69637970325a7a8e4e322f09158 /Documentation/infiniband | |
parent | af3674d62d3470c4573709c031e6b17f1f39c96b (diff) |
IB/hfi1: Document new sysfs entries for hfi1 driver
This patch adds description for the sdma engine related sysfs entries
for the HFI1 driver.
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Reviewed-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Reviewed-by: Jianxin Xiong <jianxin.xiong@intel.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'Documentation/infiniband')
-rw-r--r-- | Documentation/infiniband/sysfs.txt | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/infiniband/sysfs.txt b/Documentation/infiniband/sysfs.txt index 45bcafe6ff8a..77570d16b170 100644 --- a/Documentation/infiniband/sysfs.txt +++ b/Documentation/infiniband/sysfs.txt @@ -89,6 +89,36 @@ HFI1 nctxts - number of allowed contexts (PSM2) chip_reset - diagnostic (root only) boardversion - board version + + sdma<N>/ - one directory per sdma engine (0 - 15) + sdma<N>/cpu_list - read-write, list of cpus for user-process to sdma + engine assignment. + sdma<N>/vl - read-only, vl the sdma engine maps to. + + The new interface will give the user control on the affinity settings + for the hfi1 device. + As an example, to set an sdma engine irq affinity and thread affinity + of a user processes to use the sdma engine, which is "near" in terms + of NUMA configuration, or physical cpu location, the user will do: + + echo "3" > /proc/irq/<N>/smp_affinity_list + echo "4-7" > /sys/devices/.../sdma3/cpu_list + cat /sys/devices/.../sdma3/vl + 0 + echo "8" > /proc/irq/<M>/smp_affinity_list + echo "9-12" > /sys/devices/.../sdma4/cpu_list + cat /sys/devices/.../sdma4/vl + 1 + + to make sure that when a process runs on cpus 4,5,6, or 7, + and uses vl=0, then sdma engine 3 is selected by the driver, + and also the interrupt of the sdma engine 3 is steered to cpu 3. + Similarly, when a process runs on cpus 9,10,11, or 12 and sets vl=1, + then engine 4 will be selected and the irq of the sdma engine 4 is + steered to cpu 8. + This assumes that in the above N is the irq number of "sdma3", + and M is irq number of "sdma4" in the /proc/interrupts file. + ports/1/ CCMgtA/ cc_settings_bin - CCA tables used by PSM2 |