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authorAndy Shevchenko2021-11-23 21:27:23 +0200
committerMark Brown2021-11-29 12:20:00 +0000
commit8393961c53b31078cfc877bc00eb0f67e1474edd (patch)
treef59813bbe0c0a032bc21c96ee996aaa235427035 /Documentation/spi
parenta9c8f68ce2c37ced2f7a8667eda71b7753ede398 (diff)
spi: pxa2xx: Get rid of unused enable_loopback member
There is no user of the enable_loopback member in the struct pxa2xx_spi_chip. Remote this legacy member completely. The mentioned in the documentation the testing phase can be performed with spidev_test tool. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211123192723.44537-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/spi')
-rw-r--r--Documentation/spi/pxa2xx.rst6
1 files changed, 0 insertions, 6 deletions
diff --git a/Documentation/spi/pxa2xx.rst b/Documentation/spi/pxa2xx.rst
index dfc7673ed15d..6347580826be 100644
--- a/Documentation/spi/pxa2xx.rst
+++ b/Documentation/spi/pxa2xx.rst
@@ -101,7 +101,6 @@ device. All fields are optional.
u8 rx_threshold;
u8 dma_burst_size;
u32 timeout;
- u8 enable_loopback;
int gpio_cs;
};
@@ -128,11 +127,6 @@ dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific
slave device. Please note that the PXA2xx SSP 1 does not support trailing byte
timeouts and must busy-wait any trailing bytes.
-The "pxa2xx_spi_chip.enable_loopback" field is used to place the SSP porting
-into internal loopback mode. In this mode the SSP controller internally
-connects the SSPTX pin to the SSPRX pin. This is useful for initial setup
-testing.
-
NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
chipselect is dropped after each spi_transfer. Most devices need chip select
asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor)