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author | Mayuresh Chitale | 2022-01-31 16:33:07 +0530 |
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committer | Anup Patel | 2022-02-02 18:57:10 +0530 |
commit | de1d7b6a51dab546160d252e47baa54adf104d4a (patch) | |
tree | c117b1965faee627f35a6f8d73d7fffbc2c85e73 /Documentation/userspace-api | |
parent | 6455317e4d0d8395e8e4a2fd1ec8d6502267dd02 (diff) |
RISC-V: KVM: make CY, TM, and IR counters accessible in VU mode
Those applications that run in VU mode and access the time CSR cause
a virtual instruction trap as Guest kernel currently does not
initialize the scounteren CSR.
To fix this, we should make CY, TM, and IR counters accessibile
by default in VU mode (similar to OpenSBI).
Fixes: a33c72faf2d73 ("RISC-V: KVM: Implement VCPU create, init and
destroy functions")
Cc: stable@vger.kernel.org
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'Documentation/userspace-api')
0 files changed, 0 insertions, 0 deletions