diff options
author | Christophe Ricard | 2015-08-14 22:33:38 +0200 |
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committer | Samuel Ortiz | 2015-08-17 00:36:54 +0200 |
commit | a6be357e9720a7f8e11e2997e60626179151d190 (patch) | |
tree | 6a94b51081c2b021db090e83b15d848f3c9b2a96 /Documentation | |
parent | 2bc4d4f8c8f3ce863e3644736d1790b0684c7eb0 (diff) |
nfc: st-nci: Add device tree documentation for spi phy
Add st-nci-spi phy devicetree documentation
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/net/nfc/st-nci-i2c.txt (renamed from Documentation/devicetree/bindings/net/nfc/st-nci.txt) | 0 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/net/nfc/st-nci-spi.txt | 31 |
2 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/nfc/st-nci.txt b/Documentation/devicetree/bindings/net/nfc/st-nci-i2c.txt index d707588ed734..d707588ed734 100644 --- a/Documentation/devicetree/bindings/net/nfc/st-nci.txt +++ b/Documentation/devicetree/bindings/net/nfc/st-nci-i2c.txt diff --git a/Documentation/devicetree/bindings/net/nfc/st-nci-spi.txt b/Documentation/devicetree/bindings/net/nfc/st-nci-spi.txt new file mode 100644 index 000000000000..525681b6dc39 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nfc/st-nci-spi.txt @@ -0,0 +1,31 @@ +* STMicroelectronics SAS. ST NCI NFC Controller + +Required properties: +- compatible: Should be "st,st21nfcb-spi" +- spi-max-frequency: Maximum SPI frequency (<= 10000000). +- interrupt-parent: phandle for the interrupt gpio controller +- interrupts: GPIO interrupt to which the chip is connected +- reset-gpios: Output GPIO pin used to reset the ST21NFCB + +Optional SoC Specific Properties: +- pinctrl-names: Contains only one value - "default". +- pintctrl-0: Specifies the pin control groups used for this controller. + +Example (for ARM-based BeagleBoard xM with ST21NFCB on SPI4): + +&mcspi4 { + + status = "okay"; + + st21nfcb: st21nfcb@0 { + + compatible = "st,st21nfcb-spi"; + + clock-frequency = <4000000>; + + interrupt-parent = <&gpio5>; + interrupts = <2 IRQ_TYPE_EDGE_RISING>; + + reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; + }; +}; |