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author | Jason Cooper | 2016-02-21 14:46:12 +0000 |
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committer | Jason Cooper | 2016-02-21 14:46:12 +0000 |
commit | 55e10798f6f74c93f36dc4a3d2ff65f1d694fbd5 (patch) | |
tree | 7057c252bf1c4aae8706b723f563f60719858479 /Documentation | |
parent | e4e1c0ea731e4a3df470110bfdf8a18d11d59351 (diff) | |
parent | 4bba66899ac654cb7c940a3af35d496a0b1952f0 (diff) |
Merge branch 'irqchip/tango' into irqchip/core
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt new file mode 100644 index 000000000000..1f441fa0ad40 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt @@ -0,0 +1,49 @@ +Sigma Designs SMP86xx/SMP87xx secondary interrupt controller + +Required properties: +- compatible: should be "sigma,smp8642-intc" +- reg: physical address of MMIO region +- ranges: address space mapping of child nodes +- interrupt-parent: phandle of parent interrupt controller +- interrupt-controller: boolean +- #address-cells: should be <1> +- #size-cells: should be <1> + +One child node per control block with properties: +- reg: address of registers for this control block +- interrupt-controller: boolean +- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt +- interrupts: interrupt spec of primary interrupt controller + +Example: + +interrupt-controller@6e000 { + compatible = "sigma,smp8642-intc"; + reg = <0x6e000 0x400>; + ranges = <0x0 0x6e000 0x400>; + interrupt-parent = <&gic>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <1>; + + irq0: interrupt-controller@0 { + reg = <0x000 0x100>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + }; + + irq1: interrupt-controller@100 { + reg = <0x100 0x100>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + }; + + irq2: interrupt-controller@300 { + reg = <0x300 0x100>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + }; +}; |