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authorLinus Torvalds2022-03-28 13:00:51 -0700
committerLinus Torvalds2022-03-28 13:00:51 -0700
commit7203062171db6669f746d14148c4af76af619e74 (patch)
tree5640e34ebe000769828632d3d6b9b95170283aab /Documentation
parentdfdc1de64248b5e1024d8188aeaf0e59ec6cecd5 (diff)
parentb31c41339f4f8a833cb9dc509f87aab6a159ffe4 (diff)
Merge tag 'tty-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH: "Here are the big set of tty and serial driver changes for 5.18-rc1. Nothing major, some more good cleanups from Jiri and 2 new serial drivers. Highlights include: - termbits cleanups - export symbol cleanups and other core cleanups from Jiri Slaby - new sunplus and mvebu uart drivers (amazing that people are still creating new uarts...) - samsung serial driver cleanups - ldisc 29 is now "reserved" for experimental/development line disciplines - lots of other tiny fixes and cleanups to serial drivers and bindings All of these have been in linux-next for a while with no reported issues" * tag 'tty-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (104 commits) vt_ioctl: fix potential spectre v1 in VT_DISALLOCATE serial: 8250: fix XOFF/XON sending when DMA is used tty: serial: samsung: Add ARTPEC-8 support dt-bindings: serial: samsung: Add ARTPEC-8 UART serial: sc16is7xx: Clear RS485 bits in the shutdown tty: serial: samsung: simplify getting OF match data tty: serial: samsung: constify variables and pointers tty: serial: samsung: constify s3c24xx_serial_drv_data members tty: serial: samsung: constify UART name tty: serial: samsung: constify s3c24xx_serial_drv_data tty: serial: samsung: reduce number of casts tty: serial: samsung: embed s3c2410_uartcfg in parent structure tty: serial: samsung: embed s3c24xx_uart_info in parent structure serial: 8250_tegra: mark acpi_device_id as unused with !ACPI tty: serial: bcm63xx: use more precise Kconfig symbol serial: SERIAL_SUNPLUS should depend on ARCH_SUNPLUS tty: serial: jsm: fix two assignments in if conditions tty: serial: jsm: remove redundant assignments to variable linestatus serial: 8250_mtk: make two read-only arrays static const serial: samsung_tty: do not unlock port->lock for uart_write_wakeup() ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml59
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-lpuart.yaml10
-rw-r--r--Documentation/devicetree/bindings/serial/mtk-uart.txt1
-rw-r--r--Documentation/devicetree/bindings/serial/mvebu-uart.txt9
-rw-r--r--Documentation/devicetree/bindings/serial/renesas,sci.yaml2
-rw-r--r--Documentation/devicetree/bindings/serial/renesas,scif.yaml5
-rw-r--r--Documentation/devicetree/bindings/serial/samsung_uart.yaml4
-rw-r--r--Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml56
8 files changed, 135 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml
new file mode 100644
index 000000000000..175f5c8f2bc5
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Marvell Armada 3720 UART clocks
+
+maintainers:
+ - Pali Rohár <pali@kernel.org>
+
+properties:
+ compatible:
+ const: marvell,armada-3700-uart-clock
+
+ reg:
+ items:
+ - description: UART Clock Control Register
+ - description: UART 2 Baud Rate Divisor Register
+
+ clocks:
+ description: |
+ List of parent clocks suitable for UART from following set:
+ "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
+ UART clock can use one from this set and when more are provided
+ then kernel would choose and configure the most suitable one.
+ It is suggest to specify at least one TBG clock to achieve
+ baudrates above 230400 and also to specify clock which bootloader
+ used for UART (most probably xtal) for smooth boot log on UART.
+
+ clock-names:
+ items:
+ - const: TBG-A-P
+ - const: TBG-B-P
+ - const: TBG-A-S
+ - const: TBG-B-S
+ - const: xtal
+ minItems: 1
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ uartclk: clock-controller@12010 {
+ compatible = "marvell,armada-3700-uart-clock";
+ reg = <0x12010 0x4>, <0x12210 0x4>;
+ clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
+ clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
+ #clock-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
index 6e04e3848261..ff364bd0fbac 100644
--- a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
@@ -20,15 +20,15 @@ properties:
- fsl,ls1021a-lpuart
- fsl,ls1028a-lpuart
- fsl,imx7ulp-lpuart
- - fsl,imx8qm-lpuart
+ - fsl,imx8qxp-lpuart
- fsl,imxrt1050-lpuart
- items:
- - enum:
- - fsl,imx8qxp-lpuart
- - fsl,imx8ulp-lpuart
+ - const: fsl,imx8ulp-lpuart
- const: fsl,imx7ulp-lpuart
- items:
- - const: fsl,imx8qm-lpuart
+ - enum:
+ - fsl,imx8qm-lpuart
+ - fsl,imx8dxl-lpuart
- const: fsl,imx8qxp-lpuart
reg:
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index b3a0bfef0d54..113b5d6a2245 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -20,6 +20,7 @@ Required properties:
* "mediatek,mt8135-uart" for MT8135 compatible UARTS
* "mediatek,mt8173-uart" for MT8173 compatible UARTS
* "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
+ * "mediatek,mt8186-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
* "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS
* "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS
* "mediatek,mt8516-uart" for MT8516 compatible UARTS
diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
index 2d0dbdf32d1d..a062bbca532c 100644
--- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
@@ -14,7 +14,10 @@ Required properties:
is provided (possible only with the "marvell,armada-3700-uart"
compatible string for backward compatibility), it will only work
if the baudrate was initialized by the bootloader and no baudrate
- change will then be possible.
+ change will then be possible. When provided it should be UART1-clk
+ for standard variant of UART and UART2-clk for extended variant
+ of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
+ should not be used and are supported only for backward compatibility.
- interrupts:
- Must contain three elements for the standard variant of the IP
(marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
@@ -34,7 +37,7 @@ Example:
uart0: serial@12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x18>;
- clocks = <&xtalclk>;
+ clocks = <&uartclk 0>;
interrupts =
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
@@ -45,7 +48,7 @@ Example:
uart1: serial@12200 {
compatible = "marvell,armada-3700-uart-ext";
reg = <0x12200 0x30>;
- clocks = <&xtalclk>;
+ clocks = <&uartclk 1>;
interrupts =
<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
index 8dda4e10e09d..bf7708a7a2c0 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
@@ -17,6 +17,7 @@ properties:
oneOf:
- items:
- enum:
+ - renesas,r9a07g043-sci # RZ/G2UL
- renesas,r9a07g044-sci # RZ/G2{L,LC}
- renesas,r9a07g054-sci # RZ/V2L
- const: renesas,sci # generic SCI compatible UART
@@ -67,6 +68,7 @@ if:
compatible:
contains:
enum:
+ - renesas,r9a07g043-sci
- renesas,r9a07g044-sci
- renesas,r9a07g054-sci
then:
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index ba5d3e0acc63..5d37f8f189fb 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -73,12 +73,12 @@ properties:
- items:
- enum:
- renesas,scif-r9a07g044 # RZ/G2{L,LC}
- - renesas,scif-r9a07g054 # RZ/V2L
- items:
- enum:
+ - renesas,scif-r9a07g043 # RZ/G2UL
- renesas,scif-r9a07g054 # RZ/V2L
- - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback for RZ/V2L
+ - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
reg:
maxItems: 1
@@ -167,7 +167,6 @@ if:
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
- renesas,scif-r9a07g044
- - renesas,scif-r9a07g054
then:
required:
- resets
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml
index 2940afb874b3..d4688e317fc5 100644
--- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml
+++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml
@@ -20,12 +20,14 @@ properties:
items:
- enum:
- apple,s5l-uart
+ - axis,artpec8-uart
- samsung,s3c2410-uart
- samsung,s3c2412-uart
- samsung,s3c2440-uart
- samsung,s3c6400-uart
- samsung,s5pv210-uart
- samsung,exynos4210-uart
+ - samsung,exynos5433-uart
- samsung,exynos850-uart
reg:
@@ -110,7 +112,9 @@ allOf:
contains:
enum:
- apple,s5l-uart
+ - axis,artpec8-uart
- samsung,exynos4210-uart
+ - samsung,exynos5433-uart
then:
properties:
clocks:
diff --git a/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml b/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml
new file mode 100644
index 000000000000..2e9b64abde70
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) Sunplus Co., Ltd. 2021
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/serial/sunplus,sp7021-uart.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Sunplus SoC SP7021 UART Controller Device Tree Bindings
+
+maintainers:
+ - Hammer Hsieh <hammerh0314@gmail.com>
+
+allOf:
+ - $ref: serial.yaml#
+
+properties:
+ compatible:
+ const: sunplus,sp7021-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ aliases {
+ serial0 = &uart0;
+ };
+
+ uart0: serial@9c000900 {
+ compatible = "sunplus,sp7021-uart";
+ reg = <0x9c000900 0x80>;
+ interrupt-parent = <&intc>;
+ interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc 0x28>;
+ resets = <&rstc 0x18>;
+ };
+...