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authorLinus Torvalds2019-07-25 09:02:34 -0700
committerLinus Torvalds2019-07-25 09:02:34 -0700
commita51edf751b660f3fc1d0724bc4cb839bdaf5576c (patch)
tree9de142b0c138329eae0c8fac78f49ecdc2fe76ba /MAINTAINERS
parentda3cc2e6f168fd52630892f4672f2f26bd217198 (diff)
parent26091eef3c179f940d2967e9bef6e22c9e1c445f (diff)
Merge tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Paul Walmsley: "Four minor RISC-V-related changes: - Add support for the new clone3 syscall for RV64, relying on the generic support - Add DT data for the gigabit Ethernet controller on the SiFive FU540 and the HiFive Unleashed board - Update MAINTAINERS to add me to the arch/riscv maintainers' list - Add support for PCIe message-signaled interrupts by reusing the generic header file" * tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: dts: Add DT node for SiFive FU540 Ethernet controller driver riscv: include generic support for MSI irqdomains MAINTAINERS: Add Paul as a RISC-V maintainer riscv: enable sys_clone3 syscall for rv64
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diff --git a/MAINTAINERS b/MAINTAINERS
index 5e1f9ee8f86f..4e2a525e22c0 100644
--- a/MAINTAINERS
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@@ -13725,6 +13725,7 @@ F: drivers/mtd/nand/raw/r852.c
F: drivers/mtd/nand/raw/r852.h
RISC-V ARCHITECTURE
+M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@sifive.com>
M: Albert Ou <aou@eecs.berkeley.edu>
L: linux-riscv@lists.infradead.org