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authorMasahiro Yamada2021-02-28 15:10:27 +0900
committerMasahiro Yamada2021-04-25 05:09:32 +0900
commit57fd251c789647552d32d2fc51bedd4f90d70f9f (patch)
treeec64861aab0f628df236c229e54a23251880475a /Makefile
parent3204a7fb98a3bccd0004ea0f2769fbeadc2c2dba (diff)
kbuild: split cc-option and friends to scripts/Makefile.compiler
scripts/Kbuild.include is included everywhere, but macros such as cc-option are needed by build targets only. For example, when 'make clean' traverses the tree, it does not need to evaluate $(call cc-option,). Split cc-option, ld-option, etc. to scripts/Makefile.compiler, which is only included from the top Makefile and scripts/Makefile.build. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile4
1 files changed, 4 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 93e6e2d28d89..80bae8a1341f 100644
--- a/Makefile
+++ b/Makefile
@@ -584,6 +584,10 @@ KBUILD_AFLAGS += $(CLANG_FLAGS)
export CLANG_FLAGS
endif
+# Include this also for config targets because some architectures need
+# cc-cross-prefix to determine CROSS_COMPILE.
+include $(srctree)/scripts/Makefile.compiler
+
ifdef config-build
# ===========================================================================
# *config targets only - make sure prerequisites are updated, and descend