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author | Chander Kashyap | 2013-09-26 14:36:35 +0530 |
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committer | Mike Turquette | 2013-12-04 10:46:45 -0800 |
commit | cdf64eeeb0d762585e2126f3024458d199c2635d (patch) | |
tree | 425caea31cd6fd5d0fbdb5af7bae55dc9b6e82cf /README | |
parent | 79ba3fdafdb5361e5158452ed6b1fca0bc39cbc8 (diff) |
clk: exynos5420: fix cpll clock register offsets
Fixes cpll control and lock register offset values for Exynos5420 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions