diff options
author | Ezequiel Garcia | 2013-05-17 08:09:58 -0300 |
---|---|---|
committer | Jason Cooper | 2013-05-19 19:36:56 +0000 |
commit | b484ff42df475c5087d614c4d477273e1906bcb9 (patch) | |
tree | b3cea22fc851c1dc4a848f503399ff1f39bb82b8 /arch/arm/boot/dts/armada-xp-db.dts | |
parent | ee514b381e17958fde5b99cba506f31ea6589c0b (diff) |
ARM: mvebu: Add support for NOR flash device on Armada XP-DB board
The Armada XP Development Board (DB-78460-BP) has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-db.dts')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-db.dts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 7c22a20d51b5..f5fc1a3868a2 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -30,6 +30,9 @@ }; soc { + ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */ + 0xf0000000 0 0xf0000000 0x1000000>; /* Device Bus, NOR 16MiB */ + internal-regs { serial@12000 { clock-frequency = <250000000>; @@ -156,6 +159,35 @@ status = "okay"; }; }; + + devbus-bootcs@10400 { + status = "okay"; + ranges = <0 0xf0000000 0x1000000>; + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <8>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + /* NOR 16 MiB */ + nor@0 { + compatible = "cfi-flash"; + reg = <0 0x1000000>; + bank-width = <2>; + }; + }; }; }; }; |