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authorPeter Senna Tschudin2017-03-14 10:23:02 +0100
committerShawn Guo2017-04-10 16:16:07 +0800
commited7740e357c4e672592d9d2097d1b01812b5fc56 (patch)
tree8b61dc5babd03cfc0772e30342ee37eb6a8501a9 /arch/arm/boot/dts/imx6q-b850v3.dts
parentfd1eb46c382a69d0fbad85def3a2f3008a76efc1 (diff)
ARM: dts: imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)
Configures the megachips-stdpxxxx-ge-b850v3-fw bridges on the GE B850v3 dts file. Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Martyn Welch <martyn.welch@collabora.co.uk> Cc: Martin Donnelly <martin.donnelly@ge.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Peter Senna Tschudin <peter.senna@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q-b850v3.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-b850v3.dts70
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts b/arch/arm/boot/dts/imx6q-b850v3.dts
index d78514c92349..2c1e98e0cf7b 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,14 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+ port@4 {
+ reg = <4>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&stdp4028_in>;
+ };
+ };
};
};
@@ -142,3 +150,65 @@
reg = <0x4a>;
};
};
+
+&mux2_i2c2 {
+ clock-frequency = <100000>;
+
+ stdp2690@72 {
+ compatible = "megachips,stdp2690-ge-b850v3-fw";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ stdp2690_in: endpoint {
+ remote-endpoint = <&stdp4028_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ stdp2690_out: endpoint {
+ /* Connector for external display */
+ };
+ };
+ };
+ };
+
+ stdp4028@73 {
+ compatible = "megachips,stdp4028-ge-b850v3-fw";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ stdp4028_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ stdp4028_out: endpoint {
+ remote-endpoint = <&stdp2690_in>;
+ };
+ };
+ };
+ };
+};