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authorBjorn Andersson2016-12-21 03:49:36 -0800
committerAndy Gross2017-01-13 12:38:17 -0600
commitf9a8aaeda669070f2c59732d17ed9677c14835a5 (patch)
tree7bf770a145e5c08d8bad3710ff29704da56898ff /arch/arm/boot/dts/qcom-apq8064-pins.dtsi
parent4123366a5538f4bd005bf4e081f3bed9b760cbba (diff)
ARM: dts: qcom: apq8064: Add riva-pil node
Add nodes for the Riva PIL, IRIS RF module, BT and WiFI services exposed by the Riva firmware and the related memory reserve. Also provides pinctrl nodes for devices enabling the riva-pil. Cc: John Stultz <john.stultz@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064-pins.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-apq8064-pins.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 6b801e7e57a2..5c023e649882 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -284,4 +284,22 @@
bias-disable = <0>;
};
};
+
+ riva_fm_pin_a: riva-fm-active {
+ pins = "gpio14", "gpio15";
+ function = "riva_fm";
+ };
+
+ riva_bt_pin_a: riva-bt-active {
+ pins = "gpio16", "gpio17";
+ function = "riva_bt";
+ };
+
+ riva_wlan_pin_a: riva-wlan-active {
+ pins = "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
+ function = "riva_wlan";
+
+ drive-strength = <6>;
+ bias-pull-down;
+ };
};