Merge tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:

* r8a77430 (RZ/G1M) SoC
  - Add XHCI support to SoC DT. Boards may enable this as appropriate

* All Renesas ARM based SoCs
  - Add missing clocks for ARM CPU cores

    Geert Uytterhoeven says "This series improves DT hardware descriptions
    for Renesas arm32 SoCs by adding missing clocks properties to the
    device nodes corresponding to ARM CPU cores."

* R-Car Gen 1 and 2, and RZ/G SoCs
  - Use R-Car Fallback compat strings for GPIO

    Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
    compat strings in peace of now deprecated non-generation specific R-Car
    GPIO fallback compat string in the DT of Renesas ARM and arm64 based
    SoCs.

    As noted in the changelogs for the r8a777[89] changes, this introduces
    an incompatibility with pre-v4.14 kernels used with new DTBs. There is
    no run-time effect for other SoCs updated by this changeset."

* r7s72100 (RZ/A1H) GR-Peach board
  - Add pin configuration subnode for ETHER pin group.
    This avoids relying on boot-loader configuration of these pins.

  - Enable ostm0 and ostm1 timers

    Jacopo Mondi says these are "to be used as clock source and clockevent
    source. The timers provides greater accuracy than the already enabled
    mtu2 one."

  - Correct leds node name indent

  - Enable MTU2 timer pulse unit

   Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
   not enabled for GR-Peach board. The timer is used as clock event source
   to schedule wake-ups, and without this enabled all sleeps not performed
   through busy waiting hang the board."

* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
  - Add USB function support

* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
  - Add USB2.0 Host support

* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
  - Rework DT architecture and add DT for camera DB

    Fabrizio Castro says "Some of the serial interfaces are exposed on the
    camera daughter board.  The camera daughter board can be connected to
    the carrier board by means of expansion connectors 1, 2 and 3. The
    carrier board may host an RZ/G1M or an RZ/G1N based SoM.

    While adding support for the serial interfaces on the camera daughter
    board we faced the dilemma of how to properly describe all of the
    possible HW configurations and how to maximize code reuse.

    The best option would be to use device tree overlays, however there is
    still some work to be done on that front before actually using them,
    therefore for the time being we decided to provide .dtsi files to
    describe the carrier board and the camera daughter board, and provide
    .dts files to describe the HW configurations we need to support."

* r8a779[0-4] R-Car Gen2 SoCs
  - Use generic node name for VSP1 nodes

    Geert Uytterhoeven says "This patch series replaces the specific node
    names used for the VSP1 nodes by the preferred generic node names, cfr.
    commit 0e1bfb72b076b07d ("v4l: vsp1: Use generic node name")."

* tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (42 commits)
  ARM: dts: r8a7743: Add xhci support to SoC dtsi
  ARM: dts: r7s72100: Add clock for CA9 CPU core
  dt-bindings: clk: r7s72100: Add missing I and G clocks
  ARM: dts: sh73a0: Add clocks for CA9 CPU cores
  ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
  ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7790: Add clocks for CA7 CPU cores
  ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
  ARM: dts: r8a7779: Add clocks for CA9 CPU cores
  ARM: dts: r8a7778: Add clock for CA9 CPU core
  ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
  ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat string
  ...

1 files changed, 6 insertions, 5 deletions

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 8f3156c0e575..a39472aab867 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -33,6 +33,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			clock-frequency = <800000000>;
+			clocks = <&z_clk>;
 		};
 	};
 
@@ -88,7 +89,7 @@
 	};
 
 	gpio0: gpio@ffc40000 {
-		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
 		reg = <0xffc40000 0x2c>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		#gpio-cells = <2>;
@@ -99,7 +100,7 @@
 	};
 
 	gpio1: gpio@ffc41000 {
-		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
 		reg = <0xffc41000 0x2c>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		#gpio-cells = <2>;
@@ -110,7 +111,7 @@
 	};
 
 	gpio2: gpio@ffc42000 {
-		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
 		reg = <0xffc42000 0x2c>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		#gpio-cells = <2>;
@@ -121,7 +122,7 @@
 	};
 
 	gpio3: gpio@ffc43000 {
-		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
 		reg = <0xffc43000 0x2c>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		#gpio-cells = <2>;
@@ -132,7 +133,7 @@
 	};
 
 	gpio4: gpio@ffc44000 {
-		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
 		reg = <0xffc44000 0x2c>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		#gpio-cells = <2>;