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authorLike Xu2022-09-19 17:10:08 +0800
committerPaolo Bonzini2022-11-09 12:26:54 -0500
commit556f3c9ad7c101aa16a43ef4539f3aabc1d7b32e (patch)
tree85f71e58ad57f76644835d480629686531e8a4f9 /arch/arm/boot/dts/r8a7779.dtsi
parent4f1fa2a1bbeb2feca436d2c86bf6f78dc4e5e4c4 (diff)
KVM: x86/pmu: Limit the maximum number of supported AMD GP counters
The AMD PerfMonV2 specification allows for a maximum of 16 GP counters, but currently only 6 pairs of MSRs are accepted by KVM. While AMD64_NUM_COUNTERS_CORE is already equal to 6, increasing without adjusting msrs_to_save_all[] could result in out-of-bounds accesses. Therefore introduce a macro (named KVM_AMD_PMC_MAX_GENERIC) to refer to the number of counters supported by KVM. Signed-off-by: Like Xu <likexu@tencent.com> Reviewed-by: Jim Mattson <jmattson@google.com> Message-Id: <20220919091008.60695-3-likexu@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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