aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorKrzysztof Kozlowski2023-04-23 17:08:37 +0200
committerGreg Kroah-Hartman2023-06-21 16:00:52 +0200
commitcc1444a3639838fd1db60ccc84ff024f619b31af (patch)
tree07269a986ee8e14d83e1d480d0da49f4ad406931 /arch/arm/boot
parent398bf0d67bcccac84efc45d413b9bd57f27af0fd (diff)
ARM: dts: vexpress: add missing cache properties
[ Upstream commit 328acc5657c6197753238d7ce0a6924ead829347 ] As all level 2 and level 3 caches are unified, add required cache-unified property to fix warnings like: vexpress-v2p-ca5s.dtb: cache-controller@2c0f0000: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230423150837.118466-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca5s.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index 3b88209bacea..ff1f9a1bcfcf 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -132,6 +132,7 @@
reg = <0x2c0f0000 0x1000>;
interrupts = <0 84 4>;
cache-level = <2>;
+ cache-unified;
};
pmu {