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authorJoonyoung Shim2014-09-26 19:43:54 +0900
committerKrzysztof Kozlowski2016-06-22 08:20:43 +0200
commit2f3428b5cf9ba4255d8729fd249cbfb8a540d33e (patch)
treeecc1ce723a1fb5e5dc5dc43bc0c0aa3ccaa31620 /arch/arm/include
parent17e0645e6ba7d7e65ec3f3e77200caf13f57d776 (diff)
ARM: EXYNOS: Fix UART address selection for DEBUG_LL
The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using A7 (like on Odroid XU family boards), it can't choose right UART physical address only the part number of CP15. Fix the detection logic by checking the Cluster ID additionally. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> [k.kozlowski: Extend commit message] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/debug/exynos.S6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S
index b17fdb7fbd34..60bf3c23200d 100644
--- a/arch/arm/include/debug/exynos.S
+++ b/arch/arm/include/debug/exynos.S
@@ -24,7 +24,11 @@
mrc p15, 0, \tmp, c0, c0, 0
and \tmp, \tmp, #0xf0
teq \tmp, #0xf0 @@ A15
- ldreq \rp, =EXYNOS5_PA_UART
+ beq 100f
+ mrc p15, 0, \tmp, c0, c0, 5
+ and \tmp, \tmp, #0xf00
+ teq \tmp, #0x100 @@ A15 + A7 but boot to A7
+100: ldreq \rp, =EXYNOS5_PA_UART
movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
ldr \rv, =S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0