Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:

 - add arch/arm/Kbuild from Masahiro Yamada.

 - simplify act_mm macro, since it contains an open-coded
   get_thread_info.

 - VFP updates for Clang from Stefan Agner.

 - Fix unwinder for Clang from Nathan Huckleberry.

 - Remove unused it8152 PCI host controller, used by the removed cm-x2xx
   platforms from Mike Rapoport.

 - Further explanation of __range_ok().

 - Remove kimage_voffset that isn't used anymore from Marc Zyngier.

 - Drop ancient Thumb-2 workaround for old binutils from Ard Biesheuvel.

 - Documentation cleanup for mach-* from Pete Zaitcev.

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8996/1: Documentation/Clean up the description of mach-<class>
  ARM: 8995/1: drop Thumb-2 workaround for ancient binutils
  ARM: 8994/1: mm: drop kimage_voffset which was only used by KVM
  ARM: uaccess: add further explanation of __range_ok()
  ARM: 8993/1: remove it8152 PCI controller driver
  ARM: 8992/1: Fix unwind_frame for clang-built kernels
  ARM: 8991/1: use VFP assembler mnemonics if available
  ARM: 8990/1: use VFP assembler mnemonics in register load/store macros
  ARM: 8989/1: use .fpu assembler directives instead of assembler arguments
  ARM: 8982/1: mm: Simplify act_mm macro
  ARM: 8981/1: add arch/arm/Kbuild

4 files changed, 29 insertions, 126 deletions

diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
deleted file mode 100644
index e175c2384f28..000000000000
--- a/arch/arm/include/asm/hardware/it8152.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/include/arm/hardware/it8152.h
- *
- * Copyright Compulab Ltd., 2006,2007
- * Mike Rapoport <mike@compulab.co.il>
- *
- * ITE 8152 companion chip register definitions
- */
-
-#ifndef __ASM_HARDWARE_IT8152_H
-#define __ASM_HARDWARE_IT8152_H
-
-#include <mach/irqs.h>
-
-extern void __iomem *it8152_base_address;
-
-#define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)
-#define IT8152_CFGREG_BASE		(it8152_base_address + 0x03f00000)
-
-#define __REG_IT8152(x)			(it8152_base_address + (x))
-
-#define IT8152_PCI_CFG_ADDR		__REG_IT8152(0x3f00800)
-#define IT8152_PCI_CFG_DATA		__REG_IT8152(0x3f00804)
-
-#define IT8152_INTC_LDCNIRR		__REG_IT8152(0x3f00300)
-#define IT8152_INTC_LDPNIRR		__REG_IT8152(0x3f00304)
-#define IT8152_INTC_LDCNIMR		__REG_IT8152(0x3f00308)
-#define IT8152_INTC_LDPNIMR		__REG_IT8152(0x3f0030C)
-#define IT8152_INTC_LDNITR		__REG_IT8152(0x3f00310)
-#define IT8152_INTC_LDNIAR		__REG_IT8152(0x3f00314)
-#define IT8152_INTC_LPCNIRR		__REG_IT8152(0x3f00320)
-#define IT8152_INTC_LPPNIRR		__REG_IT8152(0x3f00324)
-#define IT8152_INTC_LPCNIMR		__REG_IT8152(0x3f00328)
-#define IT8152_INTC_LPPNIMR		__REG_IT8152(0x3f0032C)
-#define IT8152_INTC_LPNITR		__REG_IT8152(0x3f00330)
-#define IT8152_INTC_LPNIAR		__REG_IT8152(0x3f00334)
-#define IT8152_INTC_PDCNIRR		__REG_IT8152(0x3f00340)
-#define IT8152_INTC_PDPNIRR		__REG_IT8152(0x3f00344)
-#define IT8152_INTC_PDCNIMR		__REG_IT8152(0x3f00348)
-#define IT8152_INTC_PDPNIMR		__REG_IT8152(0x3f0034C)
-#define IT8152_INTC_PDNITR		__REG_IT8152(0x3f00350)
-#define IT8152_INTC_PDNIAR		__REG_IT8152(0x3f00354)
-#define IT8152_INTC_INTC_TYPER		__REG_IT8152(0x3f003FC)
-
-#define IT8152_GPIO_GPDR		__REG_IT8152(0x3f00500)
-
-/*
-  Interrupt controller per register summary:
-  ---------------------------------------
-  LCDNIRR:
-  IT8152_LD_IRQ(8) PCICLK stop
-  IT8152_LD_IRQ(7) MCLK ready
-  IT8152_LD_IRQ(6) s/w
-  IT8152_LD_IRQ(5) UART
-  IT8152_LD_IRQ(4) GPIO
-  IT8152_LD_IRQ(3) TIMER 4
-  IT8152_LD_IRQ(2) TIMER 3
-  IT8152_LD_IRQ(1) TIMER 2
-  IT8152_LD_IRQ(0) TIMER 1
-
-  LPCNIRR:
-  IT8152_LP_IRQ(x) serial IRQ x
-
-  PCIDNIRR:
-  IT8152_PD_IRQ(14) PCISERR
-  IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
-  IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
-  IT8152_PD_IRQ(11) PCI INTD
-  IT8152_PD_IRQ(10) PCI INTC
-  IT8152_PD_IRQ(9)  PCI INTB
-  IT8152_PD_IRQ(8)  PCI INTA
-  IT8152_PD_IRQ(7)  serial INTD
-  IT8152_PD_IRQ(6)  serial INTC
-  IT8152_PD_IRQ(5)  serial INTB
-  IT8152_PD_IRQ(4)  serial INTA
-  IT8152_PD_IRQ(3)  serial IRQ IOCHK (IOCHKR)
-  IT8152_PD_IRQ(2)  chaining DMA (CDMAR)
-  IT8152_PD_IRQ(1)  USB (USBR)
-  IT8152_PD_IRQ(0)  Audio controller (ACR)
- */
-#define IT8152_IRQ(x)   (IRQ_BOARD_START + (x))
-#define IT8152_LAST_IRQ	(IRQ_BOARD_START + 40)
-
-/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
-#define IT8152_LD_IRQ_COUNT     9
-#define IT8152_LP_IRQ_COUNT     16
-#define IT8152_PD_IRQ_COUNT     15
-
-/* Priorities: */
-#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
-#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
-#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
-
-/* frequently used interrupts */
-#define IT8152_PCISERR		IT8152_PD_IRQ(14)
-#define IT8152_H2PTADR		IT8152_PD_IRQ(13)
-#define IT8152_H2PMAR		IT8152_PD_IRQ(12)
-#define IT8152_PCI_INTD		IT8152_PD_IRQ(11)
-#define IT8152_PCI_INTC		IT8152_PD_IRQ(10)
-#define IT8152_PCI_INTB		IT8152_PD_IRQ(9)
-#define IT8152_PCI_INTA		IT8152_PD_IRQ(8)
-#define IT8152_CDMA_INT		IT8152_PD_IRQ(2)
-#define IT8152_USB_INT		IT8152_PD_IRQ(1)
-#define IT8152_AUDIO_INT	IT8152_PD_IRQ(0)
-
-struct pci_dev;
-struct pci_sys_data;
-
-extern void it8152_irq_demux(struct irq_desc *desc);
-extern void it8152_init_irq(void);
-extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
-extern struct pci_ops it8152_ops;
-
-#endif /* __ASM_HARDWARE_IT8152_H */
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 98c6b91be4a8..b5fdd30252f8 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -78,7 +78,11 @@ static inline void set_fs(mm_segment_t fs)
 
 #define segment_eq(a, b)	((a) == (b))
 
-/* We use 33-bit arithmetic here... */
+/*
+ * We use 33-bit arithmetic here.  Success returns zero, failure returns
+ * addr_limit.  We take advantage that addr_limit will be zero for KERNEL_DS,
+ * so this will always return success in that case.
+ */
 #define __range_ok(addr, size) ({ \
 	unsigned long flag, roksum; \
 	__chk_user_ptr(addr);	\
diff --git a/arch/arm/include/asm/vfp.h b/arch/arm/include/asm/vfp.h
index 7157d2a30a49..19928bfb4f9c 100644
--- a/arch/arm/include/asm/vfp.h
+++ b/arch/arm/include/asm/vfp.h
@@ -9,6 +9,7 @@
 #ifndef __ASM_VFP_H
 #define __ASM_VFP_H
 
+#ifndef CONFIG_AS_VFP_VMRS_FPINST
 #define FPSID			cr0
 #define FPSCR			cr1
 #define MVFR1			cr6
@@ -16,6 +17,7 @@
 #define FPEXC			cr8
 #define FPINST			cr9
 #define FPINST2			cr10
+#endif
 
 /* FPSID bits */
 #define FPSID_IMPLEMENTER_BIT	(24)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 628c336e8e3b..ba0d4cb5377e 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -8,7 +8,16 @@
 
 #include <asm/vfp.h>
 
-@ Macros to allow building with old toolkits (with no VFP support)
+#ifdef CONFIG_AS_VFP_VMRS_FPINST
+	.macro	VFPFMRX, rd, sysreg, cond
+	vmrs\cond	\rd, \sysreg
+	.endm
+
+	.macro	VFPFMXR, sysreg, rd, cond
+	vmsr\cond	\sysreg, \rd
+	.endm
+#else
+	@ Macros to allow building with old toolkits (with no VFP support)
 	.macro	VFPFMRX, rd, sysreg, cond
 	MRC\cond	p10, 7, \rd, \sysreg, cr0, 0	@ FMRX	\rd, \sysreg
 	.endm
@@ -16,26 +25,29 @@
 	.macro	VFPFMXR, sysreg, rd, cond
 	MCR\cond	p10, 7, \rd, \sysreg, cr0, 0	@ FMXR	\sysreg, \rd
 	.endm
+#endif
 
 	@ read all the working registers back into the VFP
 	.macro	VFPFLDMIA, base, tmp
+	.fpu	vfpv2
 #if __LINUX_ARM_ARCH__ < 6
-	LDC	p11, cr0, [\base],#33*4		    @ FLDMIAX \base!, {d0-d15}
+	fldmiax	\base!, {d0-d15}
 #else
-	LDC	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d0-d15}
+	vldmia	\base!, {d0-d15}
 #endif
 #ifdef CONFIG_VFPv3
+	.fpu	vfpv3
 #if __LINUX_ARM_ARCH__ <= 6
 	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
 	ldr	\tmp, [\tmp, #0]
 	tst	\tmp, #HWCAP_VFPD32
-	ldclne	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
+	vldmiane \base!, {d16-d31}
 	addeq	\base, \base, #32*4		    @ step over unused register space
 #else
 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
 	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field
 	cmp	\tmp, #2			    @ 32 x 64bit registers?
-	ldcleq	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
+	vldmiaeq \base!, {d16-d31}
 	addne	\base, \base, #32*4		    @ step over unused register space
 #endif
 #endif
@@ -44,22 +56,23 @@
 	@ write all the working registers out of the VFP
 	.macro	VFPFSTMIA, base, tmp
 #if __LINUX_ARM_ARCH__ < 6
-	STC	p11, cr0, [\base],#33*4		    @ FSTMIAX \base!, {d0-d15}
+	fstmiax	\base!, {d0-d15}
 #else
-	STC	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d0-d15}
+	vstmia	\base!, {d0-d15}
 #endif
 #ifdef CONFIG_VFPv3
+	.fpu	vfpv3
 #if __LINUX_ARM_ARCH__ <= 6
 	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
 	ldr	\tmp, [\tmp, #0]
 	tst	\tmp, #HWCAP_VFPD32
-	stclne	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
+	vstmiane \base!, {d16-d31}
 	addeq	\base, \base, #32*4		    @ step over unused register space
 #else
 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
 	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field
 	cmp	\tmp, #2			    @ 32 x 64bit registers?
-	stcleq	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
+	vstmiaeq \base!, {d16-d31}
 	addne	\base, \base, #32*4		    @ step over unused register space
 #endif
 #endif