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authorLeela Krishna Amudala2014-05-09 22:51:04 +0900
committerKukjin Kim2014-05-26 04:04:59 +0900
commit75ad2ab28f0f184a7ba7f816b62be04c3c0ba80a (patch)
tree6bfcb96f1e2bfbd80f86b4c6ae167dc6f1797337 /arch/arm/lib/csumipv6.S
parentb5783dcaed065ae6622a9795a19a4eda748b64f8 (diff)
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
A common macro v7_exit_coherency_flush available which does the below tasks in the seqeunce. -clearing C bit -clearing L1 cache -exit SMP -instruction and data synchronization So removing the local functions which does the same thing and use the macro instead. Signed-off-by: Leela Krishna Amudala <leela.krishna@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> [cw00.choi@samsung.com: tested on exynos3250 based board] Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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