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authorJonghwan Choi2012-06-27 09:47:35 +0900
committerKukjin Kim2012-07-12 16:15:08 +0900
commit7d896aaceb0ac361abf581b3b21de20f52da0ce9 (patch)
tree2fd0f659cea96bfc71eefb83a253b6939cb57d68 /arch/arm/mach-exynos/include/mach/regs-pmu.h
parent485802a6c524e62b5924849dd727ddbb1497cc71 (diff)
ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
When SYS_WDTRESET is set, watchdog timer reset request is ignored by power management unit. Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/regs-pmu.h')
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-pmu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 43a99e6f56ab..d4e392b811a3 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -232,6 +232,11 @@
#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
+#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
+#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
+
+#define EXYNOS5_SYS_WDTRESET (1 << 20)
+
#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)