aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/cpu-imx27.c
diff options
context:
space:
mode:
authorUwe Kleine-König2010-06-10 15:11:13 +0200
committerUwe Kleine-König2010-06-24 15:40:38 +0200
commitd109167b9c1002770d194644d5580a1f3588f7fc (patch)
tree0cbc6fc238b6ce639080a9bf1971c813534d8777 /arch/arm/mach-imx/cpu-imx27.c
parentf1d4cbef18999548ade1007bfb63cc1fa69c385e (diff)
ARM: imx: rename mach dir for mx21 and mx27 to mach-imx
Finally all imx code should end up there, start with mach-mx2. While touching all files rename some files to use a hyphen instead of an underscore. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/cpu-imx27.c')
-rw-r--r--arch/arm/mach-imx/cpu-imx27.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
new file mode 100644
index 000000000000..d8d3b2d84dc5
--- /dev/null
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+/*
+ * i.MX27 specific CPU detection code
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+
+#include <mach/hardware.h>
+
+static int cpu_silicon_rev = -1;
+static int cpu_partnumber;
+
+#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
+
+static void query_silicon_parameter(void)
+{
+ u32 val;
+ /*
+ * now we have access to the IO registers. As we need
+ * the silicon revision very early we read it here to
+ * avoid any further hooks
+ */
+ val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+ + SYS_CHIP_ID));
+
+ cpu_silicon_rev = (int)(val >> 28);
+ cpu_partnumber = (int)((val >> 12) & 0xFFFF);
+}
+
+/*
+ * Returns:
+ * the silicon revision of the cpu
+ * -EINVAL - not a mx27
+ */
+int mx27_revision(void)
+{
+ if (cpu_silicon_rev == -1)
+ query_silicon_parameter();
+
+ if (cpu_partnumber != 0x8821)
+ return -EINVAL;
+
+ return cpu_silicon_rev;
+}
+EXPORT_SYMBOL(mx27_revision);