diff options
| author | Jungseung Lee | 2014-11-29 02:54:27 +0100 |
|---|---|---|
| committer | Russell King | 2014-12-03 16:00:04 +0000 |
| commit | 12e669b4874274caaefd20d3c729471b8ebe8d93 (patch) | |
| tree | acd436ae033e6eab6bebd3ab63062d14963b686b /arch/arm/mm | |
| parent | 802318743a449f74d3fc952ad7cdcbd3a44dcdc2 (diff) | |
ARM: 8237/1: fix flush_pfn_alias
L1_CACHE_BYTES could be larger than real L1 cache line size.
In that case, flush_pfn_alias() would omit to flush last bytes
as much as L1_CACHE_BYTES - real cache line size.
So fix end address to "to + PAGE_SIZE - 1". The bottom bits of the address
is LINELEN. that is ignored by mcrr.
Signed-off-by: Jungseung Lee <js07.lee@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/flush.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 265b836b3bd1..34b66af516ea 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -33,7 +33,7 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) asm( "mcrr p15, 0, %1, %0, c14\n" " mcr p15, 0, %2, c7, c10, 4" : - : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) + : "r" (to), "r" (to + PAGE_SIZE - 1), "r" (zero) : "cc"); } |