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authorIngo Molnar2008-09-05 18:56:57 +0200
committerIngo Molnar2008-09-05 18:56:57 +0200
commit616ad8c44281c0c6711a72b560e01ec335ff27e0 (patch)
tree0a20453ffedb09db6fb41a0c2208ccc2c7751d3a /arch/arm/mm
parent99809963c99e1ed868d9ebeb4a5e7ee1cbe0309f (diff)
parentb380b0d4f7dffcc235c0facefa537d4655619101 (diff)
Merge branch 'linus' into x86/defconfig
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c2
-rw-r--r--arch/arm/mm/mmu.c50
-rw-r--r--arch/arm/mm/proc-arm940.S1
-rw-r--r--arch/arm/mm/proc-arm946.S1
4 files changed, 53 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 20eec4ba173f..7b5a25d81576 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -14,7 +14,7 @@
#include <linux/init.h>
#include <asm/cacheflush.h>
-#include <asm/plat-orion/cache-feroceon-l2.h>
+#include <plat/cache-feroceon-l2.h>
/*
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 2d6d682c206a..25d9a11eb617 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -568,6 +568,55 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
create_mapping(io_desc + i);
}
+static int __init check_membank_valid(struct membank *mb)
+{
+ /*
+ * Check whether this memory region has non-zero size.
+ */
+ if (mb->size == 0)
+ return 0;
+
+ /*
+ * Check whether this memory region would entirely overlap
+ * the vmalloc area.
+ */
+ if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
+ printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
+ "(vmalloc region overlap).\n",
+ mb->start, mb->start + mb->size - 1);
+ return 0;
+ }
+
+ /*
+ * Check whether this memory region would partially overlap
+ * the vmalloc area.
+ */
+ if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
+ phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
+ unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
+
+ printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
+ "to -%.8lx (vmalloc region overlap).\n",
+ mb->start, mb->start + mb->size - 1,
+ mb->start + newsize - 1);
+ mb->size = newsize;
+ }
+
+ return 1;
+}
+
+static void __init sanity_check_meminfo(struct meminfo *mi)
+{
+ int i;
+ int j;
+
+ for (i = 0, j = 0; i < mi->nr_banks; i++) {
+ if (check_membank_valid(&mi->bank[i]))
+ mi->bank[j++] = mi->bank[i];
+ }
+ mi->nr_banks = j;
+}
+
static inline void prepare_page_table(struct meminfo *mi)
{
unsigned long addr;
@@ -753,6 +802,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
void *zero_page;
build_mem_type_table();
+ sanity_check_meminfo(mi);
prepare_page_table(mi);
bootmem_init(mi);
devicemaps_init(mdesc);
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 1a3d63df8e90..551244d5ca19 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -15,6 +15,7 @@
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
/* ARM940T has a 4KB DCache comprising 256 lines of 4 words */
#define CACHE_DLINESIZE 16
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 82d579ac9b98..6168c6160dee 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -17,6 +17,7 @@
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
/*
* ARM946E-S is synthesizable to have 0KB to 1MB sized D-Cache,