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authorVasily Khoruzhick2020-01-07 20:20:15 -0800
committerChen-Yu Tsai2020-01-13 16:52:36 +0800
commitf267eff70c0c4f51765fcb2498444d7bc0048725 (patch)
tree7fbc9b40fadeaf60653ce6f966162b809196c9a0 /arch/arm64/boot/dts/allwinner
parentb71818cbda252fc0ceb09939518376141f3b63ce (diff)
arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
Add CPU clock to the CPU nodes since it is a prerequisite for enabling DVFS. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> [wens@csie.org: Replace CLK_CPUX macro with raw number] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 293059ffbbf6..72eedd39a2eb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -51,6 +51,8 @@
reg = <0>;
enable-method = "psci";
next-level-cache = <&L2>;
+ clocks = <&ccu 21>;
+ clock-names = "cpu";
};
cpu1: cpu@1 {
@@ -59,6 +61,8 @@
reg = <1>;
enable-method = "psci";
next-level-cache = <&L2>;
+ clocks = <&ccu 21>;
+ clock-names = "cpu";
};
cpu2: cpu@2 {
@@ -67,6 +71,8 @@
reg = <2>;
enable-method = "psci";
next-level-cache = <&L2>;
+ clocks = <&ccu 21>;
+ clock-names = "cpu";
};
cpu3: cpu@3 {
@@ -75,6 +81,8 @@
reg = <3>;
enable-method = "psci";
next-level-cache = <&L2>;
+ clocks = <&ccu 21>;
+ clock-names = "cpu";
};
L2: l2-cache {