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authorAapo Vienamo2018-08-10 21:08:40 +0300
committerThierry Reding2018-08-27 12:27:30 +0200
commit6f90c6f0db83f2be2dcd9f1a07a5238751b3a7f7 (patch)
treef8c5063efc9b35b363848d0a482892944009e7af /arch/arm64/boot/dts/nvidia/tegra186.dtsi
parent63af8bcd23a6adb056c10c872f3da14e1ed8469f (diff)
arm64: dts: tegra186: Add SDHCI tap and trim values
Add SDHCI inbound and outbound SDHCI sampling trimmer values for Tegra186. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra186.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index b7020dd2be44..3b2fe0d99aaf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -246,6 +246,8 @@
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
nvidia,pad-autocal-pull-up-offset-sdr104 = <0x03>;
nvidia,pad-autocal-pull-down-offset-sdr104 = <0x05>;
+ nvidia,default-tap = <0x5>;
+ nvidia,default-trim = <0xb>;
status = "disabled";
};
@@ -264,6 +266,8 @@
nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x06>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x07>;
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
+ nvidia,default-tap = <0x5>;
+ nvidia,default-trim = <0xb>;
status = "disabled";
};
@@ -284,6 +288,8 @@
nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x06>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x07>;
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
+ nvidia,default-tap = <0x5>;
+ nvidia,default-trim = <0xb>;
status = "disabled";
};
@@ -299,6 +305,8 @@
nvidia,pad-autocal-pull-down-offset-hs400 = <0x05>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x0a>;
+ nvidia,default-tap = <0x5>;
+ nvidia,default-trim = <0x9>;
status = "disabled";
};