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authorAntoine Tenart2017-08-24 10:46:39 +0200
committerGregory CLEMENT2017-08-30 11:37:06 +0200
commit72af17b9a8caa1fd373c7615cdfef5ee10e20577 (patch)
tree28a7a49208b9ae408f05e62c5db1d4d7c5f80258 /arch/arm64
parent791b0ade82a77a2db7c61971a1f154cdb2896a82 (diff)
arm64: dts: marvell: mcbin: enable more networking ports
This patch enables the two GE/SFP ports. They are configured in 10GKR mode by default. To do this the cpm_xdmio is enabled as well, and two phy descriptions are added. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
index 21fb721be6cb..acf5c7d16d79 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
@@ -202,6 +202,30 @@
};
};
+&cpm_xmdio {
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0>;
+ };
+
+ phy8: ethernet-phy@8 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <8>;
+ };
+};
+
+&cpm_ethernet {
+ status = "okay";
+};
+
+&cpm_eth0 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "10gbase-kr";
+};
+
&cpm_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
@@ -231,6 +255,12 @@
status = "okay";
};
+&cps_eth0 {
+ status = "okay";
+ phy = <&phy8>;
+ phy-mode = "10gbase-kr";
+};
+
&cps_eth1 {
/* CPS Lane 0 - J5 (Gigabit RJ45) */
status = "okay";