diff options
| author | Arnd Bergmann | 2022-05-27 22:21:08 +0200 |
|---|---|---|
| committer | Arnd Bergmann | 2022-05-27 22:21:09 +0200 |
| commit | 8a1e75c53c7a514dbd4f3c61ceb6f6d7d11dfd6d (patch) | |
| tree | 94f3d0b8244a675ceb342e728c68a0784ff43679 /arch/arm64 | |
| parent | 440517772bec24f618ec98bc608024ad1b37e80f (diff) | |
| parent | cd414d5ac1fdeecf0617737e688a1af00858253a (diff) | |
Merge tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late
Clock properties for cru nodes to match the yaml-converted bindings
and renaming of Quartz-A bluetooth pin nodename to not conflict with
Yaml constraints.
* tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: rename Quartz64-A bluetooth gpios
arm64: dts: rockchip: add clocks property to cru node rk3368
arm64: dts: rockchip: add clocks property to cru node rk3308
arm64: dts: rockchip: add clocks to rk356x cru
Link: https://lore.kernel.org/r/7695907.Sb9uPGUboI@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 |
4 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 1cbe2126186e..2dfa67f1cd67 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -745,10 +745,11 @@ cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; - rockchip,grf = <&grf>; - assigned-clocks = <&cru SCLK_RTC32K>; assigned-clock-rates = <32768>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index c99da90328e9..4f0b5feaa5e6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -747,6 +747,8 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3368-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 141a433429b5..1534e11a9ad1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -652,8 +652,8 @@ compatible = "brcm,bcm43438-bt"; clocks = <&rk817 1>; clock-names = "lpo"; - device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 1042e68602de..914f13c0d399 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -397,6 +397,8 @@ cru: clock-controller@fdd20000 { compatible = "rockchip,rk3568-cru"; reg = <0x0 0xfdd20000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; #clock-cells = <1>; #reset-cells = <1>; assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; |