diff options
| author | Vignesh Raghavendra | 2023-03-20 10:19:34 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2023-05-11 23:03:10 +0900 |
| commit | fe9dc0a2643e6fa1866f8056095a8466381d73dd (patch) | |
| tree | 49862485357bce789e8307551fe2caf0e6458366 /arch/arm64 | |
| parent | 1e9fc6c473210138eff3425a6136f0a9bf4eb0ae (diff) | |
arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB
[ Upstream commit 6974371cab1c488a53960945cb139b20ebb5f16b ]
Per AM62x SoC datasheet[0] L2 cache is 512KB.
[0] https://www.ti.com/lit/gpn/am625 Page 1.
Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230320044935.2512288-1-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am625.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi index 887f31c23fef..31b37abbb8d5 100644 --- a/arch/arm64/boot/dts/ti/k3-am625.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi @@ -96,7 +96,7 @@ L2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; - cache-size = <0x40000>; + cache-size = <0x80000>; cache-line-size = <64>; cache-sets = <512>; }; |