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authorMaxime Ripard2013-11-07 12:01:48 +0100
committerDaniel Lezcano2013-12-11 11:40:01 +0100
commit31f8ad387e4306ec1fb2a01c5cd0d648b5e9bff5 (patch)
tree010b3f800330c11e1a892bfd8dae8b1470e4cbe3 /arch/arm
parent4411902a13e6b64873dc21abafeb57db335efcf1 (diff)
ARM: sun7i: a20: Add support for the High Speed Timers
The Allwinner A20 has support for four high speed timers. Apart for the number of timers (4 vs 2), it's basically the same logic than the high speed timers found in the sun5i chips. Now that we have a driver to support it, we can enable them in the device tree. [dlezcano] : Fixed conflict with 428abbb8 "Enable the I2C controllers" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..ee6cec7b0c90 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -395,6 +395,16 @@
status = "disabled";
};
+ hstimer@01c60000 {
+ compatible = "allwinner,sun7i-a20-hstimer";
+ reg = <0x01c60000 0x1000>;
+ interrupts = <0 81 1>,
+ <0 82 1>,
+ <0 83 1>,
+ <0 84 1>;
+ clocks = <&ahb_gates 28>;
+ };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,