diff options
| author | Uwe Kleine-König | 2009-12-16 17:29:39 +0100 |
|---|---|---|
| committer | Uwe Kleine-König | 2010-01-08 16:41:24 +0100 |
| commit | a3f5ac7838a93977f71288310336a725eb6e62db (patch) | |
| tree | b71a4d22661d1f5bc914ddfc8725b43d819af3c8 /arch/arm | |
| parent | 1f2ddd64da6e53365102d831aa9e0446b78f0300 (diff) | |
imx21: define and use MX21_IO_ADDRESS
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Agustín Ferrín Pozuelo <gatoguan-os@yahoo.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-mx2/clock_imx21.c | 4 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx21.h | 5 |
2 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c index 6ab3c729a456..2367b6c5f071 100644 --- a/arch/arm/mach-mx2/clock_imx21.c +++ b/arch/arm/mach-mx2/clock_imx21.c @@ -28,7 +28,7 @@ #include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM(off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) /* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0) @@ -1235,7 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_enable(&uart_clk[0]); #endif - mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR), + mxc_timer_init(&gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), MX21_INT_GPT1); return 0; } diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index bb297d8765a7..5b9f062cfd25 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -92,6 +92,11 @@ #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ +#define MX21_IO_ADDRESS(x) ( \ + IMX_IO_ADDRESS(x, MX21_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX21_X_MEMC)) + /* fixed interrupt numbers */ #define MX21_INT_CSPI3 6 #define MX21_INT_GPIO 8 |