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authorAndy Shevchenko2014-08-19 20:29:14 +0300
committerVinod Koul2014-09-11 11:48:12 +0530
commit7e1e2f27c5508518e58e5cbb11e26cbb815f4c56 (patch)
treefbee764662f30cc35618446958488896be81ae0d /arch/avr32/mach-at32ap
parent61c4319cb523a2346416cddaa7d4e2f9260c14d9 (diff)
dmaengine: dw: convert dw_dma_slave to use explicit HS interfaces
Instead of exposing the possibility to set DMA registers CFG_HI and CFG_LO strict user to provide handshake interfaces explicitly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index ec7be287a97e..37b75602adf6 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1356,10 +1356,8 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
goto fail;
slave->sdata.dma_dev = &dw_dmac0_device.dev;
- slave->sdata.cfg_hi = (DWC_CFGH_SRC_PER(0)
- | DWC_CFGH_DST_PER(1));
- slave->sdata.cfg_lo &= ~(DWC_CFGL_HS_DST_POL
- | DWC_CFGL_HS_SRC_POL);
+ slave->sdata.src_id = 0;
+ slave->sdata.dst_id = 1;
slave->sdata.src_master = 1;
slave->sdata.dst_master = 0;
@@ -2054,8 +2052,7 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
/* Check if DMA slave interface for capture should be configured. */
if (flags & AC97C_CAPTURE) {
rx_dws->dma_dev = &dw_dmac0_device.dev;
- rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
- rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ rx_dws->src_id = 3;
rx_dws->src_master = 0;
rx_dws->dst_master = 1;
}
@@ -2063,8 +2060,7 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
/* Check if DMA slave interface for playback should be configured. */
if (flags & AC97C_PLAYBACK) {
tx_dws->dma_dev = &dw_dmac0_device.dev;
- tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
- tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ tx_dws->dst_id = 4;
tx_dws->src_master = 0;
tx_dws->dst_master = 1;
}
@@ -2136,8 +2132,7 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
dws = &data->dws;
dws->dma_dev = &dw_dmac0_device.dev;
- dws->cfg_hi = DWC_CFGH_DST_PER(2);
- dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ dws->dst_id = 2;
dws->src_master = 0;
dws->dst_master = 1;