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authorLinus Torvalds2010-10-21 14:37:00 -0700
committerLinus Torvalds2010-10-21 14:37:00 -0700
commit70ada77920723fbc2b35e9b301022fb1e166b41b (patch)
treef30f24135eff89020d8ae21d6c7a83cf5c812585 /arch/frv
parentb22793f7fdc38d73c4bb4299a313deef56dcfe66 (diff)
parent2764c500be0c1f057349ee6c81557239de060f87 (diff)
Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (53 commits) spi/omap2_mcspi: Verify TX reg is empty after TX only xfer with DMA spi/omap2_mcspi: disable channel after TX_ONLY transfer in PIO mode spi/bfin_spi: namespace local structs spi/bfin_spi: init early spi/bfin_spi: check per-transfer bits_per_word spi/bfin_spi: warn when CS is driven by hardware (CPHA=0) spi/bfin_spi: cs should be always low when a new transfer begins spi/bfin_spi: fix typo in comment spi/bfin_spi: reject unsupported SPI modes spi/bfin_spi: use dma_disable_irq_nosync() in irq handler spi/bfin_spi: combine duplicate SPI_CTL read/write logic spi/bfin_spi: reset ctl_reg bits when setup is run again on a device spi/bfin_spi: push all size checks into the transfer function spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handler spi/bfin_spi: sync hardware state before reprogramming everything spi/bfin_spi: save/restore state when suspending/resuming spi/bfin_spi: redo GPIO CS handling Blackfin: SPI: expand SPI bitmasks spi/bfin_spi: use the SPI namespaced bit names spi/bfin_spi: drop extra memory we don't need ...
Diffstat (limited to 'arch/frv')
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