diff options
| author | Qi Hu | 2023-06-15 14:35:52 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2023-09-13 09:42:25 +0200 |
| commit | ab5c5c10d0668578b40e76faa316a995b316064b (patch) | |
| tree | 7284bc5754ff9d0de632bd2814b631ab86a31f3d /arch/loongarch | |
| parent | 9920a52362a0d37720163e4b7d2de94de92ae470 (diff) | |
LoongArch: Fix the write_fcsr() macro
[ Upstream commit 346dc929623cef70ff7832a4fa0ffd1b696e312a ]
The "write_fcsr()" macro uses wrong the positions for val and dest in
asm. Fix it!
Reported-by: Miao HAO <haomiao19@mails.ucas.ac.cn>
Signed-off-by: Qi Hu <huqi@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/loongarch')
| -rw-r--r-- | arch/loongarch/include/asm/loongarch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h index 62835d84a647..3d15fa5bef37 100644 --- a/arch/loongarch/include/asm/loongarch.h +++ b/arch/loongarch/include/asm/loongarch.h @@ -1488,7 +1488,7 @@ __BUILD_CSR_OP(tlbidx) #define write_fcsr(dest, val) \ do { \ __asm__ __volatile__( \ - " movgr2fcsr %0, "__stringify(dest)" \n" \ + " movgr2fcsr "__stringify(dest)", %0 \n" \ : : "r" (val)); \ } while (0) |