aboutsummaryrefslogtreecommitdiff
path: root/arch/m68k
diff options
context:
space:
mode:
authorPhilippe De Muyter2012-09-09 17:56:35 +0200
committerGreg Ungerer2012-09-27 23:28:40 +1000
commit300b9ff609ca027b9964a453a8156e6fe0077cde (patch)
tree09a8cf3808a95b9b84c8d661dc8d7be1ef9d77a7 /arch/m68k
parent0c0e6db8068393400f5c0ccbb0d22bf14b56a7ca (diff)
m68knommu: use "r", not "i" constraint in cacheflush asm's
Let the compiler choose which register to use in the cache flushing asm statements, instead of imposing %d0. Additionally, fix two typo's. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h19
1 files changed, 8 insertions, 11 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 7cafb537d03c..d2b3935ae147 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -34,10 +34,9 @@ static inline void __clear_cache_all(void)
{
#ifdef CACHE_INVALIDATE
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
- "movec %%d0, %%CACR\n\t"
+ "movec %0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATE) : "d0" );
+ : : "r" (CACHE_INVALIDATE) );
#endif
}
@@ -58,10 +57,9 @@ static inline void __flush_icache_all(void)
{
#ifdef CACHE_INVALIDATEI
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
- "movec %%d0, %%CACR\n\t"
+ "movec %0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATEI) : "d0" );
+ : : "r" (CACHE_INVALIDATEI) );
#endif
}
@@ -72,19 +70,18 @@ static inline void __flush_dcache_all(void)
#endif
#ifdef CACHE_INVALIDATED
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
- "movec %%d0, %%CACR\n\t"
+ "movec %0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATED) : "d0" );
+ : : "r" (CACHE_INVALIDATED) );
#else
- /* Flush the wrtite buffer */
+ /* Flush the write buffer */
__asm__ __volatile__ ( "nop" );
#endif
}
/*
* Push cache entries at supplied address. We want to write back any dirty
- * data and the invalidate the cache lines associated with this address.
+ * data and then invalidate the cache lines associated with this address.
*/
static inline void cache_push(unsigned long paddr, int len)
{