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authorLinus Torvalds2019-03-11 18:33:52 -0700
committerLinus Torvalds2019-03-11 18:33:52 -0700
commitf3124ccf025caf25b764d900d1f9c49731673e49 (patch)
tree460bbf63646493d90296fa9daad2a85d65be7eef /arch/m68k
parentd14d7f14f177834788a276fc7b1317b539cedca2 (diff)
parentd7e9d01ac2920959b474c6363dba269a868f4db9 (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu update from Greg Ungerer: "Only a single change to provide platform side support for the eDMA hardware module on the ColdFire MCF5441X SoC" * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k: add ColdFire mcf5441x eDMA platform support
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/coldfire/device.c81
-rw-r--r--arch/m68k/coldfire/m5441x.c4
-rw-r--r--arch/m68k/include/asm/m5441xsim.h15
3 files changed, 98 insertions, 2 deletions
diff --git a/arch/m68k/coldfire/device.c b/arch/m68k/coldfire/device.c
index 908d58347790..b4103b6bfdeb 100644
--- a/arch/m68k/coldfire/device.c
+++ b/arch/m68k/coldfire/device.c
@@ -14,11 +14,14 @@
#include <linux/spi/spi.h>
#include <linux/gpio.h>
#include <linux/fec.h>
+#include <linux/dmaengine.h>
#include <asm/traps.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
#include <asm/mcfqspi.h>
+#include <linux/platform_data/edma.h>
+#include <linux/platform_data/dma-mcf-edma.h>
/*
* All current ColdFire parts contain from 2, 3, 4 or 10 UARTS.
@@ -476,6 +479,81 @@ static struct platform_device mcf_i2c5 = {
#endif /* MCFI2C_BASE5 */
#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
+#if IS_ENABLED(CONFIG_MCF_EDMA)
+
+static const struct dma_slave_map mcf_edma_map[] = {
+ { "dreq0", "rx-tx", MCF_EDMA_FILTER_PARAM(0) },
+ { "dreq1", "rx-tx", MCF_EDMA_FILTER_PARAM(1) },
+ { "uart.0", "rx", MCF_EDMA_FILTER_PARAM(2) },
+ { "uart.0", "tx", MCF_EDMA_FILTER_PARAM(3) },
+ { "uart.1", "rx", MCF_EDMA_FILTER_PARAM(4) },
+ { "uart.1", "tx", MCF_EDMA_FILTER_PARAM(5) },
+ { "uart.2", "rx", MCF_EDMA_FILTER_PARAM(6) },
+ { "uart.2", "tx", MCF_EDMA_FILTER_PARAM(7) },
+ { "timer0", "rx-tx", MCF_EDMA_FILTER_PARAM(8) },
+ { "timer1", "rx-tx", MCF_EDMA_FILTER_PARAM(9) },
+ { "timer2", "rx-tx", MCF_EDMA_FILTER_PARAM(10) },
+ { "timer3", "rx-tx", MCF_EDMA_FILTER_PARAM(11) },
+ { "fsl-dspi.0", "rx", MCF_EDMA_FILTER_PARAM(12) },
+ { "fsl-dspi.0", "tx", MCF_EDMA_FILTER_PARAM(13) },
+ { "fsl-dspi.1", "rx", MCF_EDMA_FILTER_PARAM(14) },
+ { "fsl-dspi.1", "tx", MCF_EDMA_FILTER_PARAM(15) },
+};
+
+static struct mcf_edma_platform_data mcf_edma_data = {
+ .dma_channels = 64,
+ .slave_map = mcf_edma_map,
+ .slavecnt = ARRAY_SIZE(mcf_edma_map),
+};
+
+static struct resource mcf_edma_resources[] = {
+ {
+ .start = MCFEDMA_BASE,
+ .end = MCFEDMA_BASE + MCFEDMA_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFEDMA_IRQ_INTR0,
+ .end = MCFEDMA_IRQ_INTR0 + 15,
+ .flags = IORESOURCE_IRQ,
+ .name = "edma-tx-00-15",
+ },
+ {
+ .start = MCFEDMA_IRQ_INTR16,
+ .end = MCFEDMA_IRQ_INTR16 + 39,
+ .flags = IORESOURCE_IRQ,
+ .name = "edma-tx-16-55",
+ },
+ {
+ .start = MCFEDMA_IRQ_INTR56,
+ .end = MCFEDMA_IRQ_INTR56,
+ .flags = IORESOURCE_IRQ,
+ .name = "edma-tx-56-63",
+ },
+ {
+ .start = MCFEDMA_IRQ_ERR,
+ .end = MCFEDMA_IRQ_ERR,
+ .flags = IORESOURCE_IRQ,
+ .name = "edma-err",
+ },
+};
+
+static u64 mcf_edma_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device mcf_edma = {
+ .name = "mcf-edma",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(mcf_edma_resources),
+ .resource = mcf_edma_resources,
+ .dev = {
+ .dma_mask = &mcf_edma_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &mcf_edma_data,
+ }
+};
+
+#endif /* IS_ENABLED(CONFIG_MCF_EDMA) */
+
static struct platform_device *mcf_devices[] __initdata = {
&mcf_uart,
#if IS_ENABLED(CONFIG_FEC)
@@ -505,6 +583,9 @@ static struct platform_device *mcf_devices[] __initdata = {
&mcf_i2c5,
#endif
#endif
+#if IS_ENABLED(CONFIG_MCF_EDMA)
+ &mcf_edma,
+#endif
};
/*
diff --git a/arch/m68k/coldfire/m5441x.c b/arch/m68k/coldfire/m5441x.c
index 55392af845fb..5bd24c9b865d 100644
--- a/arch/m68k/coldfire/m5441x.c
+++ b/arch/m68k/coldfire/m5441x.c
@@ -137,6 +137,8 @@ struct clk *mcf_clks[] = {
static struct clk * const enable_clks[] __initconst = {
/* make sure these clocks are enabled */
+ &__clk_0_15, /* dspi.1 */
+ &__clk_0_17, /* eDMA */
&__clk_0_18, /* intc0 */
&__clk_0_19, /* intc0 */
&__clk_0_20, /* intc0 */
@@ -157,8 +159,6 @@ static struct clk * const disable_clks[] __initconst = {
&__clk_0_8, /* can.0 */
&__clk_0_9, /* can.1 */
&__clk_0_14, /* i2c.1 */
- &__clk_0_15, /* dspi.1 */
- &__clk_0_17, /* eDMA */
&__clk_0_22, /* i2c.0 */
&__clk_0_23, /* dspi.0 */
&__clk_0_28, /* tmr.1 */
diff --git a/arch/m68k/include/asm/m5441xsim.h b/arch/m68k/include/asm/m5441xsim.h
index c87556d5581c..4892f314ff38 100644
--- a/arch/m68k/include/asm/m5441xsim.h
+++ b/arch/m68k/include/asm/m5441xsim.h
@@ -282,6 +282,21 @@
* DSPI module.
*/
#define MCFDSPI_BASE0 0xfc05c000
+#define MCFDSPI_BASE1 0xfC03c000
#define MCF_IRQ_DSPI0 (MCFINT0_VECBASE + MCFINT0_DSPI0)
+#define MCF_IRQ_DSPI1 (MCFINT1_VECBASE + MCFINT1_DSPI1)
+/*
+ * eDMA module.
+ */
+#define MCFEDMA_BASE 0xfc044000
+#define MCFEDMA_SIZE 0x4000
+#define MCFINT0_EDMA_INTR0 8
+#define MCFINT0_EDMA_ERR 24
+#define MCFEDMA_EDMA_INTR16 8
+#define MCFEDMA_EDMA_INTR56 0
+#define MCFEDMA_IRQ_INTR0 (MCFINT0_VECBASE + MCFINT0_EDMA_INTR0)
+#define MCFEDMA_IRQ_INTR16 (MCFINT1_VECBASE + MCFEDMA_EDMA_INTR16)
+#define MCFEDMA_IRQ_INTR56 (MCFINT2_VECBASE + MCFEDMA_EDMA_INTR56)
+#define MCFEDMA_IRQ_ERR (MCFINT0_VECBASE + MCFINT0_EDMA_ERR)
#endif /* m5441xsim_h */