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authorAtsushi Nemoto2008-07-11 00:33:08 +0900
committerRalf Baechle2008-07-15 18:44:35 +0100
commit89d63fe179520b11f54de1f26755b7444c79e73a (patch)
treefede06c5648335652c864fc35c951d991cbab183 /arch/mips/Kconfig
parent22b1d707ffc99faebd86257ad19d5bb9fc624734 (diff)
[MIPS] TXx9: Reorganize PCI code
Split out PCIC dependent code and SoC dependent code from board dependent code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code. Also fix some build problems on CONFIG_PCI=n. As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards and PCI66 support is available for all TX49 boards. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3202960f7597..2ea6fff88811 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -575,7 +575,7 @@ config TOSHIBA_RBTX4927
select HW_HAS_PCI
select IRQ_CPU
select IRQ_TXX9
- select I8259 if TOSHIBA_FPCIB0
+ select PCI_TX4927
select SWAP_IO_SPACE
select SYS_HAS_CPU_TX49XX
select SYS_SUPPORTS_32BIT_KERNEL
@@ -598,6 +598,7 @@ config TOSHIBA_RBTX4938
select HW_HAS_PCI
select IRQ_CPU
select IRQ_TXX9
+ select PCI_TX4927
select SWAP_IO_SPACE
select SYS_HAS_CPU_TX49XX
select SYS_SUPPORTS_32BIT_KERNEL