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authorFlorian Fainelli2010-10-31 23:49:58 +0100
committerRalf Baechle2010-12-16 18:10:56 +0000
commit0bc6791707694c77b3543de39f77972a65de917a (patch)
treeb3c0f870535093c701816abcde5cd617b1cbf46e /arch/mips/ar7/clock.c
parentff42d62047e45075c54a5543bd4f110dfd032d11 (diff)
MIPS: AR7: Fix loops per jiffies on TNETD7200 devices
TNETD7200 run their CPU clock faster than the default CPU clock we assume. In order to have the correct loops per jiffies settings, initialize clocks right before setting mips_hpt_frequency. As a side effect, we can no longer use msleep in clocks.c which requires other parts of the kernel to be initialized, so replace these with mdelay. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ar7/clock.c')
-rw-r--r--arch/mips/ar7/clock.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index fc0e7154e8d6..2ca4ada1c291 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -239,12 +239,12 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
calculate(base_clock, frequency, &prediv, &postdiv, &mul);
writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
- msleep(1);
+ mdelay(1);
writel(4, &clock->pll);
while (readl(&clock->pll) & PLL_STATUS)
;
writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
- msleep(75);
+ mdelay(75);
}
static void __init tnetd7300_init_clocks(void)
@@ -456,7 +456,7 @@ void clk_put(struct clk *clk)
}
EXPORT_SYMBOL(clk_put);
-int __init ar7_init_clocks(void)
+void __init ar7_init_clocks(void)
{
switch (ar7_chip_id()) {
case AR7_CHIP_7100:
@@ -472,7 +472,4 @@ int __init ar7_init_clocks(void)
}
/* adjust vbus clock rate */
vbus_clk.rate = bus_clk.rate / 2;
-
- return 0;
}
-arch_initcall(ar7_init_clocks);