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authorLinus Torvalds2006-06-29 13:44:45 -0700
committerLinus Torvalds2006-06-29 13:44:45 -0700
commit8d231c11fd0b694c447e59e687754b6999eea0a2 (patch)
treeb0b3c17efff7018bbf948e489f642c8079f33cc0 /arch/mips/au1000
parent1f1332f727c3229eb2166a83fec5d3de6a73dce2 (diff)
parent8db089c6b5594c961fb6bc6d613b9926e0d3d98f (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (33 commits) [MIPS] Add missing backslashes to macro definitions. [MIPS] Death list of board support to be removed after 2.6.18. [MIPS] Remove BSD and Sys V compat data types. [MIPS] ioc3.h: Uses u8, so include <linux/types.h>. [MIPS] 74K: Assume it will also have an AR bit in config7 [MIPS] Treat CPUs with AR bit as physically indexed. [MIPS] Oprofile: Support VSMP on 34K. [MIPS] MIPS32/MIPS64 S-cache fix and cleanup [MIPS] excite: PCI makefile needs to use += if it wants a chance to work. [MIPS] excite: plat_setup -> plat_mem_setup. [MIPS] au1xxx: export dbdma functions [MIPS] au1xxx: dbdma, no sleeping under spin_lock [MIPS] au1xxx: fix PSC_SMBTXRX_RSR. [MIPS] Early printk for IP27. [MIPS] Fix handling of 0 length I & D caches. [MIPS] Typo fixes. [MIPS] MIPS32/MIPS64 secondary cache management [MIPS] Fix FIXADDR_TOP for TX39/TX49. [MIPS] Remove first timer interrupt setup in wrppmc_timer_setup() [MIPS] Fix configuration of R2 CPU features and multithreading. ...
Diffstat (limited to 'arch/mips/au1000')
-rw-r--r--arch/mips/au1000/common/dbdma.c6
-rw-r--r--arch/mips/au1000/common/irq.c14
-rw-r--r--arch/mips/au1000/common/power.c22
-rw-r--r--arch/mips/au1000/csb250/init.c6
4 files changed, 26 insertions, 22 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 6ee090bd86c9..a547e47dd5fd 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -290,7 +290,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
/* If kmalloc fails, it is caught below same
* as a channel not available.
*/
- ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
+ ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
chan_tab_ptr[i] = ctp;
break;
}
@@ -730,6 +730,8 @@ au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
return rv;
}
+EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest);
+
void
au1xxx_dbdma_stop(u32 chanid)
{
@@ -821,6 +823,8 @@ au1xxx_get_dma_residue(u32 chanid)
return rv;
}
+EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue);
+
void
au1xxx_dbdma_chan_free(u32 chanid)
{
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index da74ac21954b..12d6edee895e 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -585,13 +585,13 @@ void intc1_req1_irqdispatch(struct pt_regs *regs)
* au_sleep function in power.c.....maybe I should just pm_register()
* them instead?
*/
-static uint sleep_intctl_config0[2];
-static uint sleep_intctl_config1[2];
-static uint sleep_intctl_config2[2];
-static uint sleep_intctl_src[2];
-static uint sleep_intctl_assign[2];
-static uint sleep_intctl_wake[2];
-static uint sleep_intctl_mask[2];
+static unsigned int sleep_intctl_config0[2];
+static unsigned int sleep_intctl_config1[2];
+static unsigned int sleep_intctl_config2[2];
+static unsigned int sleep_intctl_src[2];
+static unsigned int sleep_intctl_assign[2];
+static unsigned int sleep_intctl_wake[2];
+static unsigned int sleep_intctl_mask[2];
void
save_au1xxx_intctl(void)
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index f4926315fb68..b035513fe30a 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -80,17 +80,17 @@ static DEFINE_SPINLOCK(pm_lock);
* We only have to save/restore registers that aren't otherwise
* done as part of a driver pm_* function.
*/
-static uint sleep_aux_pll_cntrl;
-static uint sleep_cpu_pll_cntrl;
-static uint sleep_pin_function;
-static uint sleep_uart0_inten;
-static uint sleep_uart0_fifoctl;
-static uint sleep_uart0_linectl;
-static uint sleep_uart0_clkdiv;
-static uint sleep_uart0_enable;
-static uint sleep_usbhost_enable;
-static uint sleep_usbdev_enable;
-static uint sleep_static_memctlr[4][3];
+static unsigned int sleep_aux_pll_cntrl;
+static unsigned int sleep_cpu_pll_cntrl;
+static unsigned int sleep_pin_function;
+static unsigned int sleep_uart0_inten;
+static unsigned int sleep_uart0_fifoctl;
+static unsigned int sleep_uart0_linectl;
+static unsigned int sleep_uart0_clkdiv;
+static unsigned int sleep_uart0_enable;
+static unsigned int sleep_usbhost_enable;
+static unsigned int sleep_usbdev_enable;
+static unsigned int sleep_static_memctlr[4][3];
/* Define this to cause the value you write to /proc/sys/pm/sleep to
* set the TOY timer for the amount of time you want to sleep.
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
index a4898b1bc66a..83f1b31a0b8e 100644
--- a/arch/mips/au1000/csb250/init.c
+++ b/arch/mips/au1000/csb250/init.c
@@ -65,9 +65,9 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
/* We use a0 and a1 to pass initrd start and size.
*/
- if (((uint) argc > 0) && ((uint)argv > 0)) {
- my_initrd_start = (uint)argc;
- my_initrd_size = (uint)argv;
+ if (((unsigned int) argc > 0) && ((uint)argv > 0)) {
+ my_initrd_start = (unsigned int)argc;
+ my_initrd_size = (unsigned int)argv;
}
/* First argv is ignored.