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authorÁlvaro Fernández Rojas2020-06-17 12:50:36 +0200
committerThomas Bogendoerfer2020-11-17 21:52:04 +0100
commit83f865d7e32e40b4903b1f83537c63fc5cdf1eb8 (patch)
tree08ebd3b09c5491532ab24f9542896be93a08966b /arch/mips/boot
parentaac025437f14c1647dc6054b95daeebed34f6971 (diff)
mips: bmips: dts: add BCM6328 reset controller support
BCM6328 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/brcm/bcm6328.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index 1f9edd710392..9dc558763c46 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,