diff options
author | David Daney | 2010-07-26 18:14:15 -0700 |
---|---|---|
committer | Ralf Baechle | 2010-08-05 13:26:27 +0100 |
commit | 1aa2b2782a056b9bb0a19fae5a04624d8dcd8379 (patch) | |
tree | b6e1197e9f83b1a155a9689e774741828780d84f /arch/mips/include | |
parent | 0c2f4551df3880083e4733b5d928d2758b71162c (diff) |
MIPS: Octeon: Support 256 MSI on PCIe
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1507/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/irq.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h index 783dae747223..6ddab8aef644 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/irq.h +++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h @@ -172,7 +172,7 @@ #ifdef CONFIG_PCI_MSI /* 152 - 215 represent the MSI interrupts 0-63 */ #define OCTEON_IRQ_MSI_BIT0 152 -#define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 63) +#define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) #else |