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authorWu Zhangjin2010-05-19 09:14:18 +0800
committerRalf Baechle2010-07-05 17:17:22 +0100
commit4085467060dc31c8d1201f69e52529a08e2c2407 (patch)
treeff809bad9d484d34d45ad31754c1aba8974ceaba /arch/mips/loongson
parentaa5f858b16d44887cf8a40a746592ae08df5664a (diff)
MIPS: Loongson: CS5536: Fix ISA support
The function _wrmsr() called by divil_lbar_disable()/enable() should be called with the offset as the argument. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Zhang Le <r0bertz@gentoo.org> Patchwork: http://patchwork.linux-mips.org/patch/1252/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson')
-rw-r--r--arch/mips/loongson/common/cs5536/cs5536_isa.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson/common/cs5536/cs5536_isa.c
index f5c0818831b2..4d9f65abeaff 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_isa.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_isa.c
@@ -61,7 +61,7 @@ static void divil_lbar_enable(void)
for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {
_rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
hi |= 0x01;
- _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
+ _wrmsr(DIVIL_MSR_REG(offset), hi, lo);
}
}
@@ -76,7 +76,7 @@ static void divil_lbar_disable(void)
for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {
_rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
hi &= ~0x01;
- _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
+ _wrmsr(DIVIL_MSR_REG(offset), hi, lo);
}
}