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authorKrzysztof Kozlowski2021-03-17 12:26:44 +0100
committerThomas Bogendoerfer2021-03-25 10:47:52 +0100
commit84a0124a9d715d844675c8cfbe5bbc9147121f73 (patch)
tree80d701e710042e3b893d8ce6a914f7b251945eb1 /arch/mips/ralink
parent3953ec08df35c0f8e2bbbe6bcf21ec775dab5410 (diff)
MIPS: ralink: define stubs for clk_set_parent to fix compile testing
The Ralink MIPS platform does not use Common Clock Framework and does not define certain clock operations leading to compile test failures: /usr/bin/mips-linux-gnu-ld: drivers/usb/phy/phy-tegra-usb.o: in function `tegra_usb_phy_init': phy-tegra-usb.c:(.text+0x1dd4): undefined reference to `clk_get_parent' Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: John Crispin <john@phrozen.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/clk.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 2f9d5acb38ea..f0bcb1051c30 100644
--- a/arch/mips/ralink/clk.c
+++ b/arch/mips/ralink/clk.c
@@ -70,6 +70,20 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
}
EXPORT_SYMBOL_GPL(clk_round_rate);
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ WARN_ON(clk);
+ return -1;
+}
+EXPORT_SYMBOL_GPL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+ WARN_ON(clk);
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(clk_get_parent);
+
void __init plat_time_init(void)
{
struct clk *clk;