aboutsummaryrefslogtreecommitdiff
path: root/arch/mips
diff options
context:
space:
mode:
authorRalf Baechle2006-08-01 23:39:42 +0100
committerRalf Baechle2006-09-27 13:37:44 +0100
commita00f6310183e164ad2cfa5f4ec5d8c724ff0f799 (patch)
tree75699ba81b4c11e21593a727b186b0b0ad9a816a /arch/mips
parent06be375b9ae237b295648980e8a52048ab640f92 (diff)
[MIPS] c-r4k: Convert init functions from inline to __init.
With more recent compilers inline doesn't necessarily means a function will always be inlined. So leave that decission to the compiler and make the function as __init. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mm/c-r4k.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 2d729f6f6348..0b2da53750bd 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -89,7 +89,7 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
blast_dcache32_page(addr);
}
-static inline void r4k_blast_dcache_page_setup(void)
+static void __init r4k_blast_dcache_page_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
@@ -103,7 +103,7 @@ static inline void r4k_blast_dcache_page_setup(void)
static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
-static inline void r4k_blast_dcache_page_indexed_setup(void)
+static void __init r4k_blast_dcache_page_indexed_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
@@ -117,7 +117,7 @@ static inline void r4k_blast_dcache_page_indexed_setup(void)
static void (* r4k_blast_dcache)(void);
-static inline void r4k_blast_dcache_setup(void)
+static void __init r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
@@ -202,7 +202,7 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
static void (* r4k_blast_icache_page)(unsigned long addr);
-static inline void r4k_blast_icache_page_setup(void)
+static void __init r4k_blast_icache_page_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
@@ -219,7 +219,7 @@ static inline void r4k_blast_icache_page_setup(void)
static void (* r4k_blast_icache_page_indexed)(unsigned long addr);
-static inline void r4k_blast_icache_page_indexed_setup(void)
+static void __init r4k_blast_icache_page_indexed_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
@@ -243,7 +243,7 @@ static inline void r4k_blast_icache_page_indexed_setup(void)
static void (* r4k_blast_icache)(void);
-static inline void r4k_blast_icache_setup(void)
+static void __init r4k_blast_icache_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
@@ -264,7 +264,7 @@ static inline void r4k_blast_icache_setup(void)
static void (* r4k_blast_scache_page)(unsigned long addr);
-static inline void r4k_blast_scache_page_setup(void)
+static void __init r4k_blast_scache_page_setup(void)
{
unsigned long sc_lsize = cpu_scache_line_size();
@@ -282,7 +282,7 @@ static inline void r4k_blast_scache_page_setup(void)
static void (* r4k_blast_scache_page_indexed)(unsigned long addr);
-static inline void r4k_blast_scache_page_indexed_setup(void)
+static void __init r4k_blast_scache_page_indexed_setup(void)
{
unsigned long sc_lsize = cpu_scache_line_size();
@@ -300,7 +300,7 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
static void (* r4k_blast_scache)(void);
-static inline void r4k_blast_scache_setup(void)
+static void __init r4k_blast_scache_setup(void)
{
unsigned long sc_lsize = cpu_scache_line_size();
@@ -1221,7 +1221,7 @@ void au1x00_fixup_config_od(void)
}
}
-static inline void coherency_setup(void)
+static void __init coherency_setup(void)
{
change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);