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| author | Huacai Chen | 2022-07-20 18:51:26 +0800 |
|---|---|---|
| committer | Marc Zyngier | 2022-07-20 12:09:20 +0100 |
| commit | ee73f14ee9eb7e1a04051b303b56130c4dd6e048 (patch) | |
| tree | 7633ad79251285a05fc8ce1c5bb782b4b674938e /arch/mips | |
| parent | 2dfded47da329a0dd619144a6bb43aefc13a77ba (diff) | |
irqchip: Add Loongson PCH LPC controller support
PCH-LPC stands for "LPC Interrupts" that described in Section 24.3 of
"Loongson 7A1000 Bridge User Manual". For more information please refer
Documentation/loongarch/irq-chip-model.rst.
Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1658314292-35346-8-git-send-email-lvjianmin@loongson.cn
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions