diff options
author | Stefan Roese | 2019-05-27 11:13:17 +0200 |
---|---|---|
committer | Paul Burton | 2019-06-24 14:15:05 -0700 |
commit | 380f072c57a590d7593050b8533d88e18b6a7daa (patch) | |
tree | 0c2417c270d8edfbf632cec54131f1f3f37fd9a5 /arch/mips | |
parent | 9ea34af728f720e54703a89b3762d598cc742f1c (diff) |
MIPS: ralink: mt7628a.dtsi: Add pinmux DT node
This patch adds the pinmux DT node using the generic "pinctrl-single"
pinmux driver. For this the system-controller register area needs to be
changed to not overlap with the pinmux registers.
This patch is based on work done by John Crispin.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/boot/dts/ralink/mt7628a.dtsi | 95 |
1 files changed, 94 insertions, 1 deletions
diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi index 3e88c8d496e4..d87f53bd6d72 100644 --- a/arch/mips/boot/dts/ralink/mt7628a.dtsi +++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi @@ -38,7 +38,100 @@ sysc: system-controller@0 { compatible = "ralink,mt7620a-sysc", "syscon"; - reg = <0x0 0x100>; + reg = <0x0 0x60>; + }; + + pinmux: pinmux@60 { + compatible = "pinctrl-single"; + reg = <0x60 0x8>; + #address-cells = <1>; + #size-cells = <0>; + #pinctrl-cells = <2>; + pinctrl-single,bit-per-mux; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x1>; + + pinmux_gpio_gpio: pinmux_gpio_gpio { + pinctrl-single,bits = <0x0 0x0 0x3>; + }; + + pinmux_spi_cs1_cs: pinmux_spi_cs1_cs { + pinctrl-single,bits = <0x0 0x0 0x30>; + }; + + pinmux_i2s_gpio: pinmux_i2s_gpio { + pinctrl-single,bits = <0x0 0x40 0xc0>; + }; + + pinmux_uart0_uart: pinmux_uart0_uart0 { + pinctrl-single,bits = <0x0 0x0 0x300>; + }; + + pinmux_sdmode_sdxc: pinmux_sdmode_sdxc { + pinctrl-single,bits = <0x0 0x0 0xc00>; + }; + + pinmux_sdmode_gpio: pinmux_sdmode_gpio { + pinctrl-single,bits = <0x0 0x400 0xc00>; + }; + + pinmux_spi_spi: pinmux_spi_spi { + pinctrl-single,bits = <0x0 0x0 0x1000>; + }; + + pinmux_refclk_gpio: pinmux_refclk_gpio { + pinctrl-single,bits = <0x0 0x40000 0x40000>; + }; + + pinmux_i2c_i2c: pinmux_i2c_i2c { + pinctrl-single,bits = <0x0 0x0 0x300000>; + }; + + pinmux_uart1_uart: pinmux_uart1_uart1 { + pinctrl-single,bits = <0x0 0x0 0x3000000>; + }; + + pinmux_uart2_uart: pinmux_uart2_uart { + pinctrl-single,bits = <0x0 0x0 0xc000000>; + }; + + pinmux_pwm0_pwm: pinmux_pwm0_pwm { + pinctrl-single,bits = <0x0 0x0 0x30000000>; + }; + + pinmux_pwm0_gpio: pinmux_pwm0_gpio { + pinctrl-single,bits = <0x0 0x10000000 + 0x30000000>; + }; + + pinmux_pwm1_pwm: pinmux_pwm1_pwm { + pinctrl-single,bits = <0x0 0x0 0xc0000000>; + }; + + pinmux_pwm1_gpio: pinmux_pwm1_gpio { + pinctrl-single,bits = <0x0 0x40000000 + 0xc0000000>; + }; + + pinmux_p0led_an_gpio: pinmux_p0led_an_gpio { + pinctrl-single,bits = <0x4 0x4 0xc>; + }; + + pinmux_p1led_an_gpio: pinmux_p1led_an_gpio { + pinctrl-single,bits = <0x4 0x10 0x30>; + }; + + pinmux_p2led_an_gpio: pinmux_p2led_an_gpio { + pinctrl-single,bits = <0x4 0x40 0xc0>; + }; + + pinmux_p3led_an_gpio: pinmux_p3led_an_gpio { + pinctrl-single,bits = <0x4 0x100 0x300>; + }; + + pinmux_p4led_an_gpio: pinmux_p4led_an_gpio { + pinctrl-single,bits = <0x4 0x400 0xc00>; + }; }; intc: interrupt-controller@200 { |