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authorPaul Cercueil2020-07-25 19:43:07 +0200
committerThomas Bogendoerfer2020-07-26 10:16:41 +0200
commitd8727385f4ab1f1603ac8e3219c0e830e1b38e90 (patch)
tree7280144d85e3583bca212a97117fc279f7e02aa8 /arch/mips
parent0bfdf92a9754eee2f83e7dcb201d8b150d0ecce9 (diff)
MIPS: ingenic: JZ4725B: Add IPU node
Add a devicetree node for the Image Processing Unit (IPU) found in the JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver will expect the IPU node to be accessed through graph port #8, as stated in the bindings documentation. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/ingenic/jz4725b.dtsi30
-rw-r--r--arch/mips/boot/dts/ingenic/rs90.dts6
2 files changed, 35 insertions, 1 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
index 89402a15f049..a8fca560878d 100644
--- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
@@ -314,6 +314,36 @@
clocks = <&cgu JZ4725B_CLK_LCD>;
clock-names = "lcd_pclk";
+
+ lcd_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@8 {
+ reg = <8>;
+
+ ipu_output: endpoint {
+ remote-endpoint = <&ipu_input>;
+ };
+ };
+ };
+ };
+
+ ipu: ipu@13080000 {
+ compatible = "ingenic,jz4725b-ipu";
+ reg = <0x13080000 0x64>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
+
+ clocks = <&cgu JZ4725B_CLK_IPU>;
+ clock-names = "ipu";
+
+ port {
+ ipu_input: endpoint {
+ remote-endpoint = <&ipu_output>;
+ };
+ };
};
bch: ecc-controller@130d0000 {
diff --git a/arch/mips/boot/dts/ingenic/rs90.dts b/arch/mips/boot/dts/ingenic/rs90.dts
index 246f97efe5ef..4eb1edbfc155 100644
--- a/arch/mips/boot/dts/ingenic/rs90.dts
+++ b/arch/mips/boot/dts/ingenic/rs90.dts
@@ -302,8 +302,12 @@
&lcd {
pinctrl-names = "default";
pinctrl-0 = <&pins_lcd>;
+};
+
+&lcd_ports {
+ port@0 {
+ reg = <0>;
- port {
panel_output: endpoint {
remote-endpoint = <&panel_input>;
};