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authorLike Xu2022-09-19 17:10:07 +0800
committerPaolo Bonzini2022-11-09 12:26:53 -0500
commit4f1fa2a1bbeb2feca436d2c86bf6f78dc4e5e4c4 (patch)
tree33694713af974b32bbabdc99abe94e39b64dfd65 /arch/nios2
parent8631ef59b62290c7d88e7209e35dfb47f33f4902 (diff)
KVM: x86/pmu: Limit the maximum number of supported Intel GP counters
The Intel Architectural IA32_PMCx MSRs addresses range allows for a maximum of 8 GP counters, and KVM cannot address any more. Introduce a local macro (named KVM_INTEL_PMC_MAX_GENERIC) and use it consistently to refer to the number of counters supported by KVM, thus avoiding possible out-of-bound accesses. Suggested-by: Jim Mattson <jmattson@google.com> Signed-off-by: Like Xu <likexu@tencent.com> Reviewed-by: Jim Mattson <jmattson@google.com> Message-Id: <20220919091008.60695-2-likexu@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/nios2')
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