aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/boot
diff options
context:
space:
mode:
authorholt@sgi.com2011-08-16 17:32:21 +0000
committerDavid S. Miller2011-08-17 20:36:38 -0700
commit243abbf2a610d801904bf1e44917e9ac4ccf823e (patch)
tree95d21ecebfa2bb1caa2e94cb8ca4f4b8ffa1d548 /arch/powerpc/boot
parent61e271ee64f1da6f69e56419ecf2ca7330884564 (diff)
flexcan: Fix up fsl-flexcan device tree binding.
This patch cleans up the documentation of the device-tree binding for the Flexcan devices on Freescale's PowerPC and ARM cores. Extra properties are not used by the driver so we are removing them. Signed-off-by: Robin Holt <holt@sgi.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>, Acked-by: Wolfgang Grandegger <wg@grandegger.com>, Cc: U Bhaskar-B22300 <B22300@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: socketcan-core@lists.berlios.de, Cc: netdev@vger.kernel.org, Cc: PPC list <linuxppc-dev@lists.ozlabs.org> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dts10
-rw-r--r--arch/powerpc/boot/dts/p1010si.dtsi10
2 files changed, 6 insertions, 14 deletions
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index 6b33b73a5ba0..d6c669c888e9 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -23,6 +23,8 @@
ethernet2 = &enet2;
pci0 = &pci0;
pci1 = &pci1;
+ can0 = &can0;
+ can1 = &can1;
};
memory {
@@ -169,14 +171,6 @@
};
};
- can0@1c000 {
- fsl,flexcan-clock-source = "platform";
- };
-
- can1@1d000 {
- fsl,flexcan-clock-source = "platform";
- };
-
usb@22000 {
phy_type = "utmi";
};
diff --git a/arch/powerpc/boot/dts/p1010si.dtsi b/arch/powerpc/boot/dts/p1010si.dtsi
index 7f51104f2e36..cabe0a453ae6 100644
--- a/arch/powerpc/boot/dts/p1010si.dtsi
+++ b/arch/powerpc/boot/dts/p1010si.dtsi
@@ -140,20 +140,18 @@
interrupt-parent = <&mpic>;
};
- can0@1c000 {
- compatible = "fsl,flexcan-v1.0";
+ can0: can@1c000 {
+ compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
interrupts = <48 0x2>;
interrupt-parent = <&mpic>;
- fsl,flexcan-clock-divider = <2>;
};
- can1@1d000 {
- compatible = "fsl,flexcan-v1.0";
+ can1: can@1d000 {
+ compatible = "fsl,p1010-flexcan";
reg = <0x1d000 0x1000>;
interrupts = <61 0x2>;
interrupt-parent = <&mpic>;
- fsl,flexcan-clock-divider = <2>;
};
L2: l2-cache-controller@20000 {