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| author | Nicholas Piggin | 2018-09-15 01:30:46 +1000 |
|---|---|---|
| committer | Michael Ellerman | 2018-09-19 21:59:41 +1000 |
| commit | 505ea82eabd2dfc69ca7a50c2996dbe969a89bec (patch) | |
| tree | 525df5e9073b23b4cd0e3068a13bebda2fd3e330 /arch/powerpc/kernel/entry_64.S | |
| parent | 09b4438db13fa83b6219aee5993711a2aa2a0c64 (diff) | |
powerpc/64s/hash: avoid the POWER5 < DD2.1 slb invalidate workaround on POWER8/9
I only have POWER8/9 to test, so just remove it for those.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/entry_64.S')
| -rw-r--r-- | arch/powerpc/kernel/entry_64.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 2206912ea4f0..77a888bfcb53 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -672,7 +672,9 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT) isync slbie r6 +BEGIN_FTR_SECTION slbie r6 /* Workaround POWER5 < DD2.1 issue */ +END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) slbmte r7,r0 isync 2: |